ZHCS328C february   2013  – september 2021 TAS2505

PRODUCTION DATA  

  1.   1
  2. 1 特性
  3. 2 应用
  4. 3 说明
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  I2S/LJF/RJF Timing in Master Mode
    7. 6.7  I2S/LJF/RJF Timing in Slave Mode
    8. 6.8  DSP Timing in Master Mode
    9. 6.9  DSP Timing in Slave Mode
    10. 6.10 I2C Interface Timing
    11. 6.11 SPI Interface Timing
    12. 6.12 Typical Characteristics
      1. 6.12.1 Class D Speaker Driver Performance
      2. 6.12.2 HP Driver Performance
  8.   Parameter Measurement Information
  9. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Audio Analog I/O
      2. 7.3.2 Audio DAC and Audio Analog Outputs
      3. 7.3.3 DAC
      4. 7.3.4 POR
      5. 7.3.5 CLOCK Generation and PLL
    4. 7.4 Device Functional Modes
      1. 7.4.1 Digital Pins
      2. 7.4.2 Analog Pins
      3. 7.4.3 Multifunction Pins
      4. 7.4.4 Analog Signals
        1. 7.4.4.1 Analog Inputs AINL and AINR
      5. 7.4.5 DAC Processing Blocks — Overview
      6. 7.4.6 Digital Mixing and Routing
      7. 7.4.7 Analog Audio Routing
      8. 7.4.8 Digital Audio and Control Interface
        1. 7.4.8.1 Digital Audio Interface
        2. 7.4.8.2 Control Interface
          1. 7.4.8.2.1 I2C Control Mode
          2. 7.4.8.2.2 SPI Digital Interface
        3. 7.4.8.3 Device Special Functions
    5. 7.5 Register Map
  10. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Applications
      1. 8.2.1 Typical Configuration
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curves
  11. 9 Power Supply Recommendations
  12. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  13. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Community Resources
    4. 11.4 Trademarks
  14. 12Mechanical, Packaging, and Orderable Information

6.9 DSP Timing in Slave Mode

All specifications at 25°C, DVDD = 1.8 V(1)
PARAMETERIOVDD = 1.8VIOVDD = 3.3 VUNIT
MINMAXMINMAX
tH(BCLK)BCLK high period3535ns
tL(BCLK)BCLK low period3535ns
ts(WS)WCLK setup88ns
th(WS)WCLK hold88ns
ts(DI)DIN setup88ns
th(DI)DIN hold88ns
trRise time44ns
tfFall time44ns
(1) All timing specifications are measured at characterization but not tested at final test.
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