ZHCS810H January 2012 – February 2018 DS125DF410
PRODUCTION DATA.
In either SMBus master or SMBus slave mode the DS125DF410 must be assigned an SMBus address. A unique address should be assigned to each device on the SMBus.
The SMBus address is latched into the DS125DF410 on power-up. The address is read in from the state of the <AD3:AD0> lines (pins 16, 21, 40, and 45 respectively) upon power-up. In either SMBus mode these address lines are input pins on power-up.
The DS125DF410 can be configured with any of 16 SMBus addresses. The SMBus addressing scheme uses the least-significant bit of the SMBus address as the Read/Write_N address bit. When an SMBus device is addressed for writing, this bit is set to 0; for reading, to 1. Table 1 below shows the write address setting for the DS125DF410 versus the values latched in on the address lines at power-up.
The address byte sent by the SMBus master over the SMBus is always 8 bits long. The least-significant bit indicates whether the address is for a write operation, in which the master will output data to the SMBus to be read by the slave, or a read operation, in which the slave will output data to the SMBus to be read by the master. if the least-significant bit is a 0, the address is for a write operation. If it is a 1, the address is for a read operation. Accordingly, SMBus addresses are sometimes referred to as seven-bit addresses. To produce the write address for the SMBus, the seven-bit address is left-shifted by one bit. To produce the read address, it is left shifted by one bit and the least-significant bit is set to 1. Table 1 shows the seven-bit addresses corresponding to each set of address line values.
When the DS125DF410 is used in SMBus slave mode, the READ_EN pin must be tied low. If it is tied high or floating, the DS125DF410 will not latch in its address from the address lines on power-up. When the READ_EN pin is tied high in SMBus slave mode i.e. when the EN_SMB pin (pin 20) is tied high, the DS125DF410 will revert to an SMBus write address of 0x30. This is a test feature. If there are multiple DS125DF410s on the same SMBus, they will all revert to an SMBus write address of 0x30, which can cause SMBus collisions and failure to access the DS125DF410s over the SMBus.
| ADDR_3 | ADDR_2 | ADDR_1 | ADDR_0 | SMBus
WRITE ADDRESS |
SEVEN-BIT
SMBus ADDRESS |
|---|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0x30 | 0x18 |
| 0 | 0 | 0 | 1 | 0x32 | 0x19 |
| 0 | 0 | 1 | 0 | 0x34 | 0x1a |
| 0 | 0 | 1 | 1 | 0x36 | 0x1b |
| 0 | 1 | 0 | 0 | 0x38 | 0x1c |
| 0 | 1 | 0 | 1 | 0x3a | 0x1d |
| 0 | 1 | 1 | 0 | 0x3c | 0x1e |
| 0 | 1 | 1 | 1 | 0x3e | 0x1f |
| 1 | 0 | 0 | 0 | 0x40 | 0x20 |
| 1 | 0 | 0 | 1 | 0x42 | 0x21 |
| 1 | 0 | 1 | 0 | 0x44 | 0x22 |
| 1 | 0 | 1 | 1 | 0x46 | 0x23 |
| 1 | 1 | 0 | 0 | 0x48 | 0x24 |
| 1 | 1 | 0 | 1 | 0x4a | 0x25 |
| 1 | 1 | 1 | 0 | 0x4c | 0x26 |
| 1 | 1 | 1 | 1 | 0x4e | 0x27 |
Once the DS125DF410 has latched in its SMBus address, its registers can be read and written using the two pins of the SMBus interface, Serial Data (SDA) and Serial Data Clock (SDC).