ZHCS810H January 2012 – February 2018 DS125DF410
PRODUCTION DATA.
Ref_mode 3 requires an external 25 MHz clock. This mode of operation is set in register 0x36 bits [5:4] = 2'b11 and is the default setting. In ref_mode 3, the external reference clock is used to aid initial phase lock, and to determine when its VCO is properly phase-locked. An external oscillator should be used to generate a 2.5V, 25 MHz reference signal which is connected to the DS125DF410 on the reference clock input pin (pin 19). The DS125DF410 does not include a crystal oscillator circuit, so a stand-alone external oscillator is required.
The reference clock speeds up the initial phase lock acquisition. The DS125DF410 is set to phase lock to a known data rate, or a constrained set of known data rates, and the digital circuitry in the DS125DF410 preconfigures the VCO frequency. This enables the DS125DF410 phase-lock to the incoming signal very quickly.
The reference clock is used to calibrate the VCO coarse tuning. However, the reference clock is not synchronous to the data stream, and the quality of the reference clock does not affect the jitter on the output retimed data. The retimed data clock for each channel is synchronous to the VCO internal to that channel of the DS125DF410.
The phase noise of the reference clock is not critical. Any commercially-available 25 MHz oscillator can provide an acceptable reference clock. The reference clock can be daisy-chained from one retimer to another so that only one reference oscillator is required in a system.