ZHCS823H March   2012  – March 2019 SN65HVD72 , SN65HVD75 , SN65HVD78

UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      典型应用图
  4. 4 修订历史记录
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Power Dissipation
    7. 7.7  Switching Characteristics: 250 kbps Device (SN65HVD72) Bit Time ≥ 4 µs
    8. 7.8  Switching Characteristics: 20 Mbps Device (SN65HVD75) Bit Time ≥50 ns
    9. 7.9  Switching Characteristics: 50 Mbps Device (SN65HVD78) Bit Time ≥20 ns
    10. 7.10 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
        1. 10.2.1.1 Data Rate and Bus Length
        2. 10.2.1.2 Stub Length
        3. 10.2.1.3 Bus Loading
        4. 10.2.1.4 Receiver Failsafe
        5. 10.2.1.5 Transient Protection
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 External Transient Protection
        2. 10.2.2.2 Isolated Bus Node Design
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13器件和文档支持
    1. 13.1 器件支持
      1. 13.1.1 第三方米6体育平台手机版_好二三四免责声明
    2. 13.2 文档支持
      1. 13.2.1 相关文档
    3. 13.3 相关链接
    4. 13.4 社区资源
    5. 13.5 商标
    6. 13.6 静电放电警告
    7. 13.7 术语表
  14. 14机械、封装和可订购信息

7.8 Switching Characteristics: 20 Mbps Device (SN65HVD75) Bit Time ≥50 ns

over recommended operating conditions
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DRIVER
tr, tf Driver differential output rise or fall time RL = 54 Ω
CL = 50 pF		 See Figure 12 2 7 14 ns
tPHL, tPLH Driver propagation delay 7 11 17 ns
tSK(P) Driver pulse skew, |tPHL – tPLH| 0 2 ns
tPHZ, tPLZ Driver disable time See Figure 13 and Figure 14 12 50 ns
tPZH, tPZL Driver enable time Receiver enabled 10 20 ns
Receiver disabled 3 7 µs
RECEIVER
tr, tf Receiver output rise or fall time CL = 15 pF See Figure 15 5 10 ns
tPHL, tPLH Receiver propagation delay time 60 70 ns
tSK(P) Receiver pulse skew, |tPHL – tPLH| 0 6 ns
tPLZ, tPHZ Receiver disable time 15 30 ns
tpZL(1), tPZH(1), tPZL(2), tPZH(2) Receiver enable time Driver enabled See Figure 16 10 50 ns
Driver disabled See Figure 17 3 8 µs

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