米6体育平台手机版

ZHCS826C January 2012 – November 2023 TPS40170-Q1

PRODUCTION DATA

5.5 Electrical Characteristics

These specifications apply for –40°C ≤ T_A ≤ +125°C, V_VIN = 12 V, unless otherwise noted.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT SUPPLY
V_VIN	Input voltage range		4.5		60	V
I_SD	Shutdown current	V_ENABLE < 100 mV		1	2.5	µA
I_QQ	Operating current, drivers not switching	V_ENABLE ≥ 2 V, f_SW = 300 kHz			4.5	mA
ENABLE
V_DIS	ENABLE pin voltage to disable the device				100	mV
V_EN	ENABLE pin voltage to enable the device		600			mV
I_ENABLE	ENABLE pin source current				300	nA
8-V AND 3.3-V REGULATORS
V_VBP	8-V regulator output voltage	V_ENABLE ≥ 2 V, 8.2 V < V_VIN ≤ 60 V, 0 mA < I_IN < 20 mA	7.8	8.0	8.3	V
V_DO	8-V regulator dropout voltage, V_VIN-VVBP	4.5 < V_VIN ≤ 8.2 V, V_EN ≥ 2 V, I_IN = 10 mA		110	200	mV
V_VDD	3.3-V regulator output voltage	V_ENABLE ≥ 2 V, 4.5 V < V_VIN ≤ 60 V, 0 mA < I_IN < 5 mA	3.22	3.3	3.42	V
FIXED AND PROGRAMMABLE UVLO
V_UVLO	Programmable UVLO ON voltage (at UVLO pin)	V_ENABLE ≥ 2 V	878	900	919	mV
I_UVLO	Hysteresis current out of UVLO pin	V_ENABLE ≥ 2 V , UVLO pin > V_UVLO	4.06	5	6.2	µA
VBP_ON	VBP turnon voltage	V_ENABLE ≥ 2 V, UVLO pin > V_UVLO	3.85		4.4	V
VBP_OFF	VBP turnoff voltage		3.6		4.05	V
VBP_HYS	VBP UVLO Hysteresis voltage		180		400	mV
REFERENCE
V_REF	Reference voltage (+ input of the error amplifier)	T_J = 25°C, 4.5 V < V_VIN ≤ 60 V	594	600	606	mV
V_REF	Reference voltage (+ input of the error amplifier)	–40°C ≤ T_J ≤ 125°C, 4.5 V < V_VIN ≤ 60 V	591	600	609	mV
OSCILLATOR
f_SW	Switching frequency	Range (typical)	100		600	kHz
		R_RT = 100 kΩ, 4.5 V < V_VIN ≤ 60 V	90	100	110
		R_RT = 31.6 kΩ, 4.5 V < V_VIN ≤ 60 V	270	300	330
		R_RT = 14.3 kΩ, 4.5 V < V_VIN ≤ 60 V	540	600	660
V_VALLEY	Valley voltage		0.7	1	1.2	V
K_PWM⁽¹⁾	PWM gain (V_VIN / V_RAMP)	4.5 V < V_VIN ≤ 60 V	14	15	16	V/V
PWM AND DUTY CYCLE
t_ON(min)⁽¹⁾	Minimum controlled pulse	V_VIN = 4.5 V, f_SW = 300 kHz		100	150	ns
		V_VIN = 12 V, f_SW = 300 kHz		75	100
		V_VIN = 60 V, f_SW = 300 kHz		50	80
t_OFF(max)⁽¹⁾	Minimum OFF time	V_VIN = 12V, f_SW = 300 kHz		170	250	ns
D_MAX⁽¹⁾	Maximum duty cycle	f_SW = 100 kHz, 4.5 V < V_VIN ≤ 60 V	95%
		f_SW = 300 kHz, 4.5 V < V_VIN ≤ 60 V	91%
		f_SW = 600 kHz, 4.5 V < V_VIN ≤ 60 V	82%
ERROR AMPLIFIER
GBWP⁽¹⁾	Gain bandwidth product		7	10	13	MHz
A_OL⁽¹⁾	Open-loop gain		80	90	95	dB
I_IB	Input bias current				100	nA
I_EAOP	Output source current	V_VFB = 0 V	2			mA
I_EAOM	Output sink current	V_VFB = 1 V	2			mA
PROGRAMMABLE SOFT START
I_{SS(source,start)}	Soft-start source current	V_SS < 0.5 V, V_SS = 0.25 V	42	52	62	µA
I_{SS(source,normal)}	Soft-start source current	V_SS > 0.5 V, V_SS = 1.5 V	9.3	11.6	13.9	µA
I_SS(sink)	Soft-start sink current	V_SS = 1.5 V	0.77	1.05	1.33	µA
V_SS(fltH₎	SS pin HIGH voltage during fault (OC or thermal) reset timing		2.38	2.5	2.61	V
V_SS(fltL₎	SS pin LOW voltage during fault (OC or thermal) reset timing		235	300	375	mV
V_{SS(steady_state)}	SS pin voltage during steady-state		3.25	3.3	3.5	V
V_SS(offst)	Initial offset voltage from SS pin to error amplifier input		525	650	775	mV
TRACKING
V_TRK(ctrl)⁽¹⁾	Range of TRK which overrides V_REF	4.5 V < V_IN ≤ 60 V	0		600	mV
SYNCHRONIZATION (PRIMARY/SECONDARY)
V_MSTR	M/S pin voltage in primary mode		3.9		VIN	V
V_SLV(0)	M/S pin voltage in secondary 0° mode		1.25		1.75	V
V_SLV(180)	M/S pin voltage in secondary 180° mode		0		0.75	V
I_SYNC(in)	SYNC pin pulldown current	M/S configured as secondary- 0° or secondary-180°	8	11	14	µA
V_{SYNC(in_high)}	SYNC pin input high-voltage level		2			V
V_{SYNC(in_low)}	SYNC pin input low-voltage level				0.8	V
t_{SYNC(high_min)}	Minimum SYNC high pulse duration		40	50		ns
t_{SYNC(low_min)}	Minimum SYNC low pulse duration		40	50		ns
GATE DRIVERS
R_HDHI	High-side driver pullup resistance	C_LOAD = 2.2 nF, I_DRV = 300 mA, T_A = –40°C to 125°C	1.37	2.64	4	Ω
R_HDLO	High-side driver pulldown resistance		1.08	2.4	4	Ω
R_LDHI	Low-side driver pullup resistance		1.37	2.4	4	Ω
R_LDLO	Low-side driver pulldown resistance		0.44	1.1	1.7	Ω
t_NON-OVERLAP1	Time delay between HDRV fall and LDRV rise	C_LOAD = 2.2 nF, V_HDRV = 2 V, V_LDRV = 2 V		50		ns
t_NON-OVERLAP2	Time delay between HDRV rise and LDRV fall	C_LOAD = 2.2 nF, V_HDRV = 2 V, V_LDRV = 2 V		60		ns
OVERCURRENT PROTECTION (LOW-SIDE MOSFET SENSING)
I_ILIM	ILIM pin source current	4.5 V < V_IN < 60 V, T_A = 25°C	9	9.75	10.45	µA
I_ILIM	ILIM pin source current	4.5 V < V_IN < 60 V, T_A = –40°C to 125°C	7		12	µA
I_ILIM,(ss)	ILIM pin source current during soft-start	4.5 V < V_IN < 60 V, T_A = 25°C		15		µA
I_ILIM,(ss)	ILIM pin source current during soft-start	4.5 V < V_IN < 60 V, T_A = –40°C to 125°C	7		12	µA
I_{ILIM, Tc}⁽¹⁾	Temperature coefficient of ILIM current	4.5 V < V_IN < 60 V		1400		ppm
V_ILIM⁽¹⁾	ILIM pin voltage operating range	4.5 V < V_IN < 60 V	50		300	mV
OCP_TH	Overcurrent protection threshold (voltage across low-side FET for detecting overcurrent)	R_ILIM = 10 kΩ, I_ILIM = 10 µA (V_ILIM = 100 mV)	–110	–100	–84	mV
SHORT CIRCUIT PROTECTION HIGH-SIDE MOSFET SENSING)
V_LDRV(max)	LDRV pin maximum voltage during calibration	R_LDRV = open		300	360	mV
A_OC3	Multiplier factor to set the SCP based on OCP level setting at the ILIM pin	R_LDRV = 10 kΩ	2.75	3.2	3.6	V/V
A_OC7		R_LDRV = open	6.4	7.25	7.91	V/V
A_OC15		R_LDRV = 20 kΩ	13.9	16.4	18	V/V
THERMAL SHUTDOWN
T_SD,set⁽¹⁾	Thermal shutdown set threshold	4.5 V < V_VIN < 60 V	155	165	175	°C
T_SD,reset⁽¹⁾	Thermal shutdown reset threshold		125	135	145	°C
T_hyst⁽¹⁾	Thermal shutdown hysteresis			30		°C
POWER GOOD
V_OV	FB pin voltage upper limit for power good	4.5 V < V_VIN < 60 V	627	647	670	mV
V_UV	FB pin voltage lower limit for power good		527	552	570
V_PG,HYST	Power good hysteresis voltage at FB pin		8.5	20	32
V_PG(out)	PGOOD pin voltage when FB pin voltage > V_OV or < V_UV, I_PGD = 2 mA				100	mV
V_PG(np)	PGOOD pin voltage when device power is removed	V_VIN is open, 10-kΩ to V_EXT = 5 V		1	1.5	V
BOOT DIODE
V_DFWD	Bootstrap diode forward voltage	I = 20 mA	0.5	0.7	0.9	V
R_BOOT-SW	Discharge resistor from BOOT to SW			1		MΩ

(1) Not production tested.