ZHCSAO4F December   2012  – March 2018 UCC27611

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     Device Images
      1.      典型应用图
  4. 修订历史记录
  5. Pin Configuration and Functions
    1.     Pin Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 VDD and Undervoltage Lockout
      2. 7.3.2 Operating Supply Current
      3. 7.3.3 Input Stage
      4. 7.3.4 Enable Function
      5. 7.3.5 Output Stage
      6. 7.3.6 Low Propagation Delays
    4. 7.4 Device Functional Modes
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Gate Drive Supply Voltage
        2. 8.2.2.2 Input Configuration
        3. 8.2.2.3 Output Configuration
        4. 8.2.2.4 Power Dissipation
        5. 8.2.2.5 Thermal Considerations
      3. 8.2.3 Application Curves
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

Pin Configuration and Functions

DRV Package
6-Pin SON With Exposed Thermal Pad
Top View
UCC27611 pin_lusba5.gif

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 VDD I Bias supply input. Connect a ceramic capacitor minimum from this pin to the GND pin as close as possible to the device with the shortest trace lengths possible.
2 IN– I Inverting input. Pull IN+ to VDD to enable output, when using the driver device in Inverting configuration.
3 IN+ I Noninverting input. Pull IN– to GND to enable output, when using the driver device in noninverting configuration.
4 OUTL O 6-A sink current output of driver.
5 OUTH O 4-A source current output of driver.
6 VREF O Drive voltage, output of internal linear regulator. Connect a ceramic capacitor minimum from this pin to the GND pin as close as possible to the device with the shortest trace lengths possible.
7 GND PAD Ground. All signals are referenced to this node.