8.3 Feature Description

The TS3DV642 is based on proprietary TI technology which uses FET switches driven by a high-voltage generated from an integrated charge-pump to achieve a low on-state resistance. TS3DV642 has 12-channel bidirectional switches with a high bandwidth (~ 7.5 GHz). TS3DV642 uses an extremely low power technology and uses only 50 µA I_CC in active mode. The device has integrated ESD that can support up to 2-kV Human-Body Model (HBM) and 1-kV Charge Device Model (CDM). TS3DV642 is offered in a 42-pin QFN package (9 mm x 3.5 mm) with 0.5 mm pitch. The device can support analog I/O signal in 0 to 5 V range. TS3DV642 also has a special feature that prevents the device from back-powering when the V_CC supply is not available and an analog signal is applied on the I/O pin. In this situation this special feature prevents leakage current in the device. The TS3DV642 is not designed for passing signals with negative swings; the high-speed signals need to be properly DC biased (usually ~1 V) before being passed to the TS3DV642. The differential S21 characteristics as a function of frequency for Port A and Port B are shown in Figure 1 and Figure 2, respectively. The figures show a differential bandwidth of 6.7 GHz and 7.7 GHz for Port A and Port B, respectively. The cross-talk (XTALK) characteristics as a function of frequency are shown in Figure 3 and Figure 4, respectively. The off-state isolation (OISO) characteristics for Port A and Port B are shown in Figure 5 and Figure 6, respectively. The return loss characteristics (S11) are shown in Figure 7. The eye pattern and Time Interval Error (TIE) histogram at 3.4 Gbps (for HDMI 1.4 applications) with TS3DV642 in path for Port A is shown in Figure 10. The eye pattern and Time Interval Error (TIE) histogram at 3.4 Gbps through path (no TS3DV642) for Port A is shown in Figure 11. The eye pattern and Time Interval Error (TIE) histogram at 3.4 Gbps (for HDMI 1.4 applications) with TS3DV642 in path for Port B is shown in Figure 12. The eye pattern and Time Interval Error (TIE) histogram at 3.4 Gbps through path (no TS3DV642) for Port A is shown in Figure 13. The eye pattern at 6.0 Gbps (for HDMI 2.0 applications) with TS3DV642 in path for Port A is shown in Figure 8. The eye pattern at 6.0 Gbps (for HDMI 2.0 applications) through path (no TS3DV642) for Port A is shown in Figure 9. Note that the eye patterns are measured with only one channel on at a time.