A proper layout is critical for the operation of a switched mode power supply, even more at high switching frequencies. Therefore, the PCB layout of the TPS6213x demands careful attention to ensure operation and to get the performance specified. A poor layout can lead to issues like the following:

• Poor regulation (both line and load)
• Stability and accuracy weaknesses
• Increased EMI radiation
• Noise sensitivity

See Figure 11-1 for the recommended layout of the TPS6213x, which is designed for common external ground connections. Therefore, both AGND and PGND pins are directly connected to the exposed thermal pad. On the PCB, the direct common ground connection of AGND and PGND to the exposed thermal pad and the system ground (ground plane) is mandatory. Also connect the VOS pin in the shortest way to V_OUT at the output capacitor. To avoid noise coupling into the VOS line, this connection should be separated from the V_OUT power line/plane as shown in Section 11.2.

Provide low inductive and resistive paths for loops with high di/dt. Therefore, paths conducting the switched load current should be as short and wide as possible. Provide low capacitive paths (with respect to all other nodes) for wires with high dv/dt. Therefore, the input and output capacitance should be placed as close as possible to the IC pins and parallel wiring over long distances as well as narrow traces should be avoided. Loops which conduct an alternating current should outline an area as small as possible, as this area is proportional to the energy radiated.

Sensitive nodes like FB and VOS need to be connected with short wires and not nearby high dv/dt signals (for example, SW). As they carry information about the output voltage, they should be connected as close as possible to the actual output voltage (at the output capacitor). The capacitor on the SS/TR pin and on AVIN as well as the FB resistors, R1 and R2, should be kept close to the IC and connect directly to those pins and the system ground plane.

The exposed thermal pad must be soldered to the circuit board for mechanical reliability and to achieve appropriate power dissipation.

The recommended layout is implemented on the EVM and shown in the TPS6213x Buck Converter Evaluation Module User's Guide. Additionally, the Gebers for HPA505 EVM are available for download.