米6体育平台手机版

ZHCSBG2B May 2013 – February 2019 ADS8860

PRODUCTION DATA.

7.5 Electrical Characteristics

all minimum and maximum specifications are at AVDD = 3 V, DVDD = 3 V, V_REF = 5 V, and f_SAMPLE = 1 MSPS over the operating free-air temperature range (unless otherwise noted); typical specifications are at T_A = 25°C, AVDD = 3 V, and DVDD = 3 V

PARAMETER			TEST CONDITIONS	MIN	TYP	MAX	UNIT
ANALOG INPUT
	Full-scale input span⁽¹⁾		AINP – AINN	0		V_REF	V
	Operating input range⁽¹⁾		AINP	–0.1		V_REF + 0.1	V
	Operating input range⁽¹⁾		AINN	–0.1		+ 0.1	V
C_I	Input capacitance		AINP and AINN terminal to GND		59		pF
	Input leakage current		During acquisition for dc input		5		nA
EXTERNAL REFERENCE INPUT
V_REF	Input range			2.5		5	V
	Reference input current		During conversion, 1-MHz sample rate, mid-code		300		μA
	Reference leakage current				250		nA
C_REF	Decoupling capacitor at the REF input			10	22		µF
SYSTEM PERFORMANCE
	Resolution				16		Bits
NMC	No missing codes			16			Bits
DNL	Differential linearity			–0.99	±0.6	1	LSB⁽²⁾
INL	Integral linearity⁽⁵⁾			–2	±0.8	2	LSB⁽²⁾
E_O	Offset error⁽³⁾			–4	±1	4	mV
	Offset error drift with temperature				±1.5		µV/°C
E_G	Gain error			–0.01	±0.005	0.01	%FSR
	Gain error drift with temperature				±0.15		ppm/°C
CMRR	Common-mode rejection ratio		With common-mode input signal = 5 V_PP at dc	90	100		dB
PSRR	Power-supply rejection ratio		At mid-code		80		dB
	Transition noise				0.5		LSB
SAMPLING DYNAMICS
t_conv	Conversion time			500		710	ns
t_ACQ	Acquisition time			290			ns
	Maximum throughput rate with or without latency					1000	kHz
	Aperture delay				4		ns
	Aperture jitter, RMS				5		ps
	Step response		Settling to 16-bit accuracy		290		ns
	Overvoltage recovery		Settling to 16-bit accuracy		290		ns
DYNAMIC CHARACTERISTICS
SINAD	Signal-to-noise + distortion⁽⁷⁾		At 1 kHz, V_REF = 5 V	90.5	92.9		dB
			At 10 kHz, V_REF = 5 V		92.9
			At 100 kHz, V_REF = 5 V		88.2
SNR	Signal-to-noise ratio⁽⁷⁾		At 1 kHz, V_REF = 5 V	92	93		dB
			At 10 kHz, V_REF = 5 V		93
			At 100 kHz, V_REF = 5 V		88.5
THD	Total harmonic distortion⁽⁷⁾⁽⁴⁾		At 1 kHz, V_REF = 5 V		–108		dB
			At 10 kHz, V_REF = 5 V		–108
			At , V_REF = 5 V		–101
SFDR	Spurious-free dynamic range⁽⁷⁾		At 1 kHz, V_REF = 5 V		108		dB
			At 10 kHz, V_REF = 5 V		108
			At 100 kHz, V_REF = 5 V		101
BW_–3dB	–3-dB small-signal bandwidth				30		MHz
POWER-SUPPLY REQUIREMENTS
	Power-supply voltage	AVDD	Analog supply	2.7	3	3.6	V
		DVDD	Digital supply range for SCLK > 40 MHz	2.7	3	3.6
		DVDD	Digital supply range for SCLK < 40 MHz	1.65	1.8	3.6
	Supply current	AVDD	1-MHz sample rate, AVDD = 3 V		1.8	2.4	mA
P_VA	Power dissipation		1-MHz sample rate, AVDD = 3 V		5.5	7.2	mW
			100-kHz sample rate, AVDD = 3 V		0.55		mW
			10-kHz sample rate, AVDD = 3 V		55		μW
IA_PD	Device power-down current⁽⁶⁾				50		nA
DIGITAL INPUTS: LOGIC FAMILY (CMOS)
V_IH	High-level input voltage		1.65 V < DVDD < 2.3 V	0.8 × DVDD		DVDD + 0.3	V
V_IH	High-level input voltage		2.3 V < DVDD < 3.6 V	0.7 × DVDD		DVDD + 0.3	V
V_IL	Low-level input voltage		1.65 V < DVDD < 2.3 V	–0.3		0.2 × DVDD	V
V_IL	Low-level input voltage		2.3 V < DVDD < 3.6 V	–0.3		0.3 × DVDD	V
I_LK	Digital input leakage current				±10	±100	nA
DIGITAL OUTPUTS: LOGIC FAMILY (CMOS)
V_OH	High-level output voltage		I_O = 500-μA source, C_LOAD = 20 pF	0.8 × DVDD		DVDD	V
V_OL	Low-level output voltage		I_O = 500-μA sink, C_LOAD = 20 pF	0		0.2 × DVDD	V
TEMPERATURE RANGE
T_A	Operating free-air temperature			–40		85	°C

(1) Ideal input span, does not include gain or offset error.

(2) LSB = least significant bit. 1 LSB at 16-bits is approximately 15.26 ppm.

(3) Measured relative to actual measured reference.

(4) Calculated on the first nine harmonics of the input frequency.

(5) This parameter is the endpoint INL, not best-fit.

(6) The device automatically enters a power-down state at the end of every conversion, and remains in power-down during the acquisition phase.

(7) All specifications expressed in decibels (dB) refer to the full-scale input (FSR) and are tested with an input signal 0.5 dB below full-scale, unless otherwise specified.