ZHCSCE8F
April 2014 – May 2019
TPD1S514
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
TPD1S514 系列电路保护方案
TPD1S514 系列方框图
4
修订历史记录
5
Device Comparison Table
6
Pin Configuration and Functions
Pin Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Thermal Information
7.5
Supply Current Consumption
7.6
Electrical Characteristics EN Pin
7.7
Thermal Shutdown Feature
7.8
Electrical Characteristics nFET Switch
7.9
Electrical Characteristics OVP Circuit
7.10
Electrical Characteristics VBUS_POWER Circuit
7.11
Timing Requirements
7.12
TPD1S514-1 Typical Characteristics
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Over Voltage Protection on VBUS_CON up to 30 V DC
8.3.2
Precision OVP (< ±1% Tolerance)
8.3.3
Low RON nFET Switch Supports Host and Charging Mode
8.3.4
VBUS_POWER, TPD1S514-1, TPD1S514-2, TPD1S514-3
8.3.5
VBUS_POWER, TPD1S514
8.3.6
Powering the System When Battery is Discharged
8.3.7
±15 kV IEC 61000-4-2 Level 4 ESD Protection
8.3.8
100 V IEC 61000-4-5 µs Surge Protection
8.3.9
Startup and OVP Recovery Delay
8.3.10
Thermal Shutdown
8.4
Device Functional Modes
8.4.1
Operation With VBUS_CON < 3.5 V (Minimum VBUS_CON)
8.4.2
Operation With VBUS_CON > VOVP
8.4.3
OTG Mode
9
Application and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
TPD1S514-1 USB 2.0/3.0 Case 1: Always Enabled
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.2.1
VBUS Voltage Range
9.2.1.2.2
Discharged Battery
9.2.1.3
Application Curves
9.2.2
TPD1S514-1 USB 2.0/3.0 Case 2: PMIC Controlled EN
9.2.2.1
Design Requirements
9.2.2.2
Detailed Design Procedure
9.2.2.2.1
VBUS Voltage Range
9.2.2.2.2
PMIC Power Requirement
9.2.2.2.3
Discharged Battery
9.2.2.3
Application Curve
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
器件和文档支持
12.1
社区资源
12.2
商标
12.3
静电放电警告
12.4
Glossary
13
机械、封装和可订购信息
8.3
Feature Description
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