The TPS65263 incorporates a peak current mode control scheme. The error amplifier is a trans-conductance amplifier with a gain of 300 µS. A typical type II compensation circuit adequately delivers a phase margin between 60° and 90°. C_b adds a high frequency pole to attenuate high frequency noise when needed. To calculate the external compensation components, follow the following steps.

1. Select switching frequency ƒ_SW that is appropriate for application depending on L and C sizes, output ripple, EMI, and etc. Switching frequency between 500 kHz to 1 MHz gives best trade-off between performance and cost. To optimize efficiency, lower switching frequency is desired.
2. Set up cross over frequency, ƒ_c, which is typically between 1/5 and 1/20 of ƒ_SW.
3. R_C can be determined by
   Equation 17.
4. Calculate CC by placing a compensation zero at or before the dominant pole
   Equation 18.
5. Optional C_b can be used to cancel the zero from the ESR associated with C_O.
   Equation 19.

Figure 9-1 DC/DC Loop Compensation