米6体育平台手机版

ZHCSCV2C june 2014 – may 2023 TPS65263

PRODUCTION DATA

7.5 Electrical Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT SUPPLY VOLTAGE
VIN	Input voltage range		4.5		18	V
UVLO	VIN undervoltage lockout	VIN rising	4	4.25	4.5	V
		VIN falling	3.5	3.75	4	V
		Hysteresis		500		mV
IDD_SDN	Shutdown supply current	EN1 = EN2 = EN3 = 0 V		8		µA
IDD_{Q_NSW}	Input quiescent current without buck1/2/3 switching	EN1 = EN2 = EN3 = 5 V, FB1 = FB2 = FB3 = 0.8 V		740		µA
IDD_{Q_NSW1}		EN1 = 5 V, EN2 = EN3 = 0 V, FB1 = 0.8 V		360		µA
IDD_{Q_NSW2}		EN2 = 5 V, EN1 = EN3 = 0 V, FB2 = 0.8 V		380		µA
IDD_{Q_NSW3}		EN3 = 5 V, EN1 = EN2 = 0 V, FB3 = 0.8 V		380		µA
V_7V	V7V LDO output voltage	V_7V load current = 0 A	6	6.3	6.6	V
I_{OCP_V7V}	V7V LDO current limit			185		mA
FEEDBACK VOLTAGE REFERENCE
V_FB	Feedback voltage	V_COMP = 1.2 V, T_J = 25°C	0.595	0.6	0.605	V
V_FB	Feedback voltage	V_COMP = 1.2 V, T_J = –40°C to 125°C	0.594	0.6	0.606	V
V_{LINEREG_BUCK}	Line regulation-DC⁽¹⁾	I_OUT1 = 1.5 A, I_OUT2 = 1 A, I_OUT3 = 1 A, 5 V < PVINx < 18 V		0.002		%/V
V_{LOADREG_BUCK}	Load regulation-DC⁽¹⁾	I_OUTx = (10-100%) × I_{OUTx_max}		0.02		%/A
BUCK1, BUCK2, BUCK3
V_ENXH	EN1/2/3 high level input voltage			1.2	1.26	V
V_ENXL	EN1/2/3 low level input voltage		1.1	1.15		V
I_ENX1	EN1/2/3 pullup current	ENx = 1 V		3.8		µA
I_ENX2	EN1/2/3 pullup current	ENx = 1.5 V		6.8		µA
I_ENhys	Hysteresis current			3		µA
I_SSX	Soft start charging current		4.3	5	6	µA
T_{ON_MIN}	Minimum on time			80	100	ns
G_{m_EA}	Error amplifier trans-conductance	–2 µA < I_COMPX < 2 µA		300		µS
G_{m_PS1/2/3}	COMP1/2/3 voltage to inductor current Gm⁽¹⁾	I_LX = 0.5 A		7.4		A/V
I_LIMIT1	Buck1 peak inductor current limit		4.5	5.5	6.5	A
I_LIMITSOURCE1	Buck1 low side source current limit			4.4		A
I_LIMITSINK1	Buck1 low side sink current limit			1.3
I_LIMIT2/3	buck2/3 peak inductor current limit		2.6	3.3	4	A
I_{LIMITSOURCE2/3}	Buck2/3 low side source current limit			2.5
I_LIMITSINK2/3	Buck2/3 low side sink current limit			1		A
Rdson_HS1	Buck1 high-side switch resistance	VIN = 12 V		105		mΩ
Rdson_LS1	Buck1 low-side switch resistance	VIN = 12 V		65		mΩ
Rdson_HS2	Buck2 high-side switch resistance	VIN = 12 V		140		mΩ
Rdson_LS2	Buck2 low-side switch resistance	VIN = 12 V		90		mΩ
Rdson_HS3	Buck3 high-side switch resistance	VIN = 12 V		140		mΩ
Rdson_LS3	Buck3 low-side switch resistance	VIN = 12 V		90		mΩ
HICCUP TIMING
T_{Hiccup_wait}	Over current wait time⁽¹⁾			0.5		ms
T_{Hiccup_re}	Hiccup time before restart⁽¹⁾			14		ms
OSCILLATOR
F_SW	Switching frequency		550	600	650	kHz
THERMAL PROTECTION
T_{TRIP_OTP}	Thermal protection trip point⁽¹⁾	Temperature rising		160		°C
T_{HYST_OTP}	Thermal protection Hysteresis⁽¹⁾	Hysteresis		20		°C
I²C INTERFACE
Addr	Address⁽²⁾	0x60H
V_IH SDA,SCL	Input high voltage				2	V
V_IL SDA,SCL	Input low voltage		0.4			V
I_I	Input current	SDA, SCL, V_I = 0.4 to 4.5 V	–10		10	µA
V_OL SDA	SDA output low voltage	SDA open drain, I_OL = 4 mA			0.4	V
ƒ_(SCL)	Maximum SCL clock frequency⁽²⁾		400			kHz
t_BUF	Bus free time between a STOP and START condition⁽²⁾		1.3			µs
t_{HD_STA}	Hold time (repeated) START condition⁽²⁾		0.6			µs
t_{SU_STO}	Setup time for STOP condition⁽²⁾		0.6			µs
t_LOW	LOW Period of the SCL Clock⁽²⁾		1.3			µs
t_HIGH	HIGH period of the SCL clock⁽²⁾		0.6			µs
t_{SU_STA}	Setup time for a repeated START condition⁽²⁾		0.6			µs
t_{SU_DAT}	Data setup time⁽²⁾		0.1			µs
t_{HD_DAT}	Data hold time⁽²⁾		0		0.9	µs
t_RCL	Rise time of SCL signal⁽²⁾	Capacitance of one bus line (pF)	20 + 0.1CB		300	ns
t_RCL1	Rise time of SCL signal after a repeated START condition and after an acknowledge BIT⁽²⁾	Capacitance of one bus line (pF)	20 + 0.1CB		300	ns
t_FCL	Fall time of SCL signal⁽²⁾	Capacitance of one bus line (pF)	20 + 0.1CB		300	ns
t_RDA	Rise time of SDA signal⁽²⁾	Capacitance of one bus line (pF)	20 + 0.1CB		300	ns
t_FDA	Fall time of SDA signal⁽²⁾	Capacitance of one bus line (pF)	20 + 0.1CB		300	ns
C_B	Capacitance of bus line(SCL and SDA)⁽²⁾				400	pF

(1) Lab validation result.

(2) Not production tested.