ZHCSCV2C june   2014  – may 2023 TPS65263

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Revision History
  6. Device Comparison Table
  7. Pin Configuration and Functions
  8. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  9. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  Adjusting the Output Voltage
      2. 8.3.2  Enable and Adjusting UVLO
      3. 8.3.3  Soft-Start Time
      4. 8.3.4  Power-Up Sequencing
      5. 8.3.5  V7V Low Dropout Regulator and Bootstrap
      6. 8.3.6  Out-of-Phase Operation
      7. 8.3.7  Output Overvoltage Protection (OVP)
      8. 8.3.8  Pulse Skipping Mode (PSM)
      9. 8.3.9  Slope Compensation
      10. 8.3.10 Overcurrent Protection
        1. 8.3.10.1 High-Side MOSFET Overcurrent Protection
        2. 8.3.10.2 Low-Side MOSFET Overcurrent Protection
      11. 8.3.11 Power Good
      12. 8.3.12 Thermal Shutdown
    4. 8.4 Device Functional Modes
      1. 8.4.1 Serial Interface Description
      2. 8.4.2 I2C Update Sequence
    5. 8.5 Register Maps
      1. 8.5.1 Register Description
      2. 8.5.2 VOUT1_SEL: Vout1 Voltage Selection Register (offset = 0x00H)
      3. 8.5.3 VOUT2_SEL: Vout2 Voltage Selection Register (offset = 0x01H)
      4. 8.5.4 VOUT3_SEL: Vout3 Voltage Selection Register (offset = 0x02H)
      5. 8.5.5 VOUT1_COM: Buck1 Command Register (offset = 0x03H)
      6. 8.5.6 VOUT2_COM: Buck2 Command Register (offset = 0x04H)
      7. 8.5.7 VOUT3_COM: Buck3 Command Register (offset = 0x05H)
      8. 8.5.8 SYS_STATUS: System Status Register (offset = 0x06H)
  10. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Output Inductor Selection
        2. 9.2.2.2 Output Capacitor Selection
        3. 9.2.2.3 Input Capacitor Selection
        4. 9.2.2.4 Loop Compensation
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 接收文档更新通知
    2. 10.2 支持资源
    3. 10.3 Trademarks
    4. 10.4 静电放电警告
    5. 10.5 术语表
  12. 11Mechanical, Packaging, and Orderable Information

Soft-Start Time

The voltage on the respective SS pin controls the start-up of buck output. When the voltage on the SS pin is less than the internal 0.6-V reference, The TPS65263 regulates the internal feedback voltage to the voltage on the SS pin instead of 0.6 V. The SS pin can be used to program an external soft-start function or to allow output of buck to track another supply during start-up. The device has an internal pullup current source of 5 µA (typical) that charges an external soft-start capacitor to provide a linear ramping voltage at SS pin. The TPS65263 regulates the internal feedback voltage to the voltage on the SS pin, allowing VOUT to rise smoothly from 0V to its regulated voltage without inrush current. The soft-start time can be calculated approximately by Equation 4 .

Equation 4. GUID-0BF385F9-797F-4FBA-B5C4-C4858358F109-low.gif

Many of the common power supply sequencing methods can be implemented using the SSx and ENx pins. Figure 8-6 shows the method implementing ratiometric sequencing by connecting the SSx pins of three buck channels together. The regulator outputs ramp up and reach regulation at the same time. When calculating the soft-start time, the pullup current source must be tripled in Equation 4.

GUID-8E3F8FE5-3F25-4B1E-BB85-A7EBF933F01B-low.gifFigure 8-6 Ratiometric Power-Up Using SSx Pins

Simultaneous power supply sequencing can be implemented by connecting capacitor to SSx pin, shown in Figure 8-7. Using Equation 4 and Equation 5, the capacitors can be calculated.

Equation 5. GUID-437AC5A6-954C-4762-876B-5DA7D905FC35-low.gif
GUID-7406D7E7-E8F9-4DA1-BEFA-8B2579A13CE0-low.gifFigure 8-7 Simultaneous Startup Sequence Using SSx Pins