This section describes the power-up requirements and PDB pin. The power supply ramp (V_DD33 and V_DDIO) should be faster than 1.5 ms with a monotonic rise. A large capacitor on the PDB pin is needed to ensure PDB arrives after all the supply pins have settled to the recommended operating voltage. When PDB pin is pulled up to V_DD33, a 10-kΩ pullup and a >10-μF capacitor to GND are required to delay the PDB input signal rise. All inputs must not be driven until both V_DD33 and V_DDIO has reached steady state. Pins VDD33_A and VDD33_B should both be externally connected, bypassed, and driven to the same potential (they are not internally connected).