7.1 Noise Performance

Delta-sigma (ΔΣ) analog-to-digital converters (ADCs) are based on the principle of oversampling. The input signal of a ΔΣ ADC is sampled at a high frequency (modulator frequency) and subsequently filtered and decimated in the digital domain to yield a conversion result at the respective output data rate. The ratio between modulator frequency and output data rate is called oversampling ratio (OSR). By increasing the OSR, and thus reducing the output data rate, the noise performance of the ADC can be optimized. In other words, the input-referred noise drops when reducing the output data rate because more samples of the internal modulator are averaged to yield one conversion result. Increasing the gain also reduces the input-referred noise, which is particularly useful when measuring low-level signals.

Table 1 to Table 8 summarize the device noise performance. Data are representative of typical noise performance at T_A = 25°C using the internal 2.048-V reference. Data shown are the result of averaging readings from a single device over a time period of approximately 0.75 seconds and are measured with the inputs internally shorted together. Table 1, Table 3, Table 5 and Table 7 list the input-referred noise in units of μV_RMS for the conditions shown. Note that µV_PP values are shown in parenthesis. Table 2, Table 4, Table 6 and Table 8 list the corresponding data in effective number of bits (ENOB) calculated from μV_RMS values using Equation 1. Note that noise-free bits calculated from peak-to-peak noise values using Equation 2 are shown in parenthesis.

The input-referred noise (Table 1, Table 3, Table 5 and Table 7) only changes marginally when using an external low-noise reference, such as the REF5020. To calculate ENOB numbers and noise-free bits when using a reference voltage other than 2.048 V, use Equation 1 to Equation 3: