The host (DSP, Microcontroller, FPGA, and so forth) configures and monitors the LMK03328 through the I²C port. The host reads and writes to a collection of control and status bits called the register map. The device blocks can be controlled and monitored through a specific grouping of bits located within the register file. The host controls and monitors certain device-wide critical parameters directly through register control and status bits. In the absence of the host, the LMK03328 can be configured to operate in pin mode either from the on-chip ROM or EEPROM, depending on the state of HW_SW_CTRL pin. The EEPROM or ROM arrays are automatically copied to the device registers upon power up. The user has the flexibility to rewrite the contents of EEPROM from the SRAM up to a 100 times but the contents of ROM can not be rewritten.

Within the device registers, there are certain bits that have read or write access. Other bits are read-only (an attempt to write to a read-only bit does not change the state of the bit). Certain device registers and bits are reserved and must not be changed from the default reset state. Figure 8-30 shows interface and control blocks within LMK03328 and the arrows refer to read access from and write access to the different embedded memories (ROM, EEPROM, and SRAM).

Figure 8-30 LMK03328 Interface and Control Block