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ZHCSE44C august 2015 – may 2023 ISO5852S

PRODUCTION DATA

7.10 Switching Characteristics

Over recommended operating conditions unless otherwise noted. All typical values are at T_A = 25°C, V_CC1 = 5 V, V_CC2 – GND2 = 15 V, GND2 – V_EE2 = 8 V

PARAMETER		TEST CONDITIONS		MIN	TYP	MAX	UNIT
t_r	Output-signal rise time at OUTH	C_LOAD = 1 nF	See Figure 8-1, Figure 8-2, and Figure 8-3	12	18	35	ns
t_f	Output-signal fall time at OUTL	C_LOAD = 1 nF		12	20	37	ns
t_PLH, t_PHL	Propagation Delay	C_LOAD = 1 nF			76	110	ns
t_sk-p	Pulse skew \|t_PHL – t_PLH\|	C_LOAD = 1 nF				20	ns
t_sk-pp	Part-to-part skew	C_LOAD = 1 nF				30⁽¹⁾	ns
t_GF _(IN,/RST)	Glitch filter on IN+, IN–, RST	C_LOAD = 1 nF		20	30	40	ns
t_{DS (90%)}	DESAT sense to 90% V_OUTH/L delay	C_LOAD = 10 nF			553	760	ns
t_{DS (10%)}	DESAT sense to 10% V_OUTH/L delay	C_LOAD = 10 nF			2	3.5	μs
t_{DS (GF)}	DESAT-glitch filter delay	C_LOAD = 1 nF			330		ns
t_{DS ( FLT)}	DESAT sense to FLT-low delay	See Figure 8-3				1.4	μs
t_LEB	Leading-edge blanking time	See Figure 8-1 and Figure 8-2		310	400	480	ns
t_GF(RSTFLT)	Glitch filter on RST for resetting FLT			300		800	ns
C_I	Input capacitance⁽²⁾	V_I = V_CC1 / 2 + 0.4 × sin (2πft), f = 1 MHz, V_CC1 = 5 V			2		pF
CMTI	Common-mode transient immunity	V_CM = 1500 V, see Figure 8-4		100	120		kV/μs

(1) Measured at same supply voltage and temperature condition

(2) Measured from input pin to ground.