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ZHCSE70D August 2015 – September 2017 TMDS181

PRODUCTION DATA.

10 Power Supply Recommendations

To minimize the power consumption of customer application, TMSD181 used the dual power supply. V_CC is 3.3 V with 5% range to support the I/O voltage. V_DD is 1.2 V to supply the internal digital control circuit. TMDS181 operates in three different working states.

Power-down mode:
- OE = Low puts the device into its lowest power state by shutting down all function blocks.
  - When OE is reasserted, the transitions from L → H create a reset, and if the device is programmed through I²C, it must be reprogrammed.
- Writing a 1 to register 09h[3].
- OE = High, HPD_SNK = Low
Standby mode: HPD_SNK = High, but no valid clock signal detect on clock lane.
Normal operation: Working in redriver or retimer
When HPD asserts, the device CDR and output enables based on the signal detector circuit result.
HPD_SRC = HPD_SNK in all conditions. The HPD channel is operational when V_CC is over 3 V.

NOTE

When the TMDS181 is put into a power-down state, the I²C registers are cleared. This is important as the TMDS_CLOCK_RATIO_STATUS bit will be cleared. If cleared and HDMI2.0 resolutions are to be supported, the TMDS181 expects the source to write a 1 to this bit location. If this does not happen, the PLL will not be set properly and no video may be evident.
Power performance of the TMDS181 is highly dependent upon the HDMI transmitter architecture driving the TMDS181 receiver. The TMDS181 has integrated the termination resistors, which increases the power consumption on the 3.3 V rail by as much as 400 mW. This is the power required by the HDMI transmitter to switch and not needed by the TMDS181 to operate properly.

Table 12. Power-Up and Operation Timing Requirements

INPUTS					STATUS
HPD_SNK	OE	SIG_EN	IN_CLK	DATA RATE	HPD_SRC	IN_Dx	SDA/SCL_CTL	OUT_Dx OUT_CLK	DDC	ARC	MODE
X	L	H or L	X	X	H	RX Termination On	Disable	High-Z	Disabled	Disable	Power-down mode
L	H	H or L	X	X	L	RX Termination On	Active	High-Z	Disabled	Disable	Power-down mode
H	H	H or L	X	X	H	RX Termination On	Active	High-Z	Disabled	Disable	Power-down mode by W 1 to 09h[3]
H	H	H (no valid signal)	No valid TMDS clock	X	H	D0-D2 disabled with RX termination On, IN_CLK active	Active	High-Z	Active	Active	Standby mode (squelch waiting)
H	H	H or L (no valid signal)	No valid TMDS clock	Retimer mode	H	D0-D2 disabled with RX termination On, IN_CLK activee	Active	High-Z	Active	Active	Standby mode (Squelch waiting)
H	H	H (Valid signal)	Valid TMDS clock	Retimer mode	H	RX active	Active	TX active	Active	Active	Normal operation
H	H	L (no valid signal)	No valid TMDS clock	Redriver mode	H	RX active	Active	TX active	Active	Active	Normal operation
H	H	H (Valid signal)	Valid TMDS clock	Redriver mode	H	RX active	Active	TX active	Active	Active	Normal operation