10 Power Supply Recommendations

The DP83867 is capable of operating with as few as two or three supplies. The I/O power supply can also be operated independently of the main device power supplies to provide flexibility for the MAC interface.

For detailed information about DP83867 power consumption for specific supplies under a wide set of conditions, see the DP83867E/IS/CS/IR/CR RGZ Power Consumption Data application report (SNLA241).

The connection diagrams for the two-supply and three-supply configurations are shown in Figure 10-1 and Figure 10-2.

For two supply configuration, both VDDA1P8 pins must be left unconnected.

Place 1-µF and 0.1-µF decoupling capacitors as close as possible to component VDD pins, placing the 0.1-µF capacitor closest to the pin.

VDDIO may be 3.3 V or 2.5 V or 1.8 V.

No Components should be connected to VDDA1P8 pins in Two-Supply Configuration.

Figure 10-1 Two-Supply Configuration

Place 1-µF and 0.1-µF decoupling capacitors as close as possible to component VDD pins, placing the 0.1-µF capacitor closest to the pin.

Note: VDDIO may be 3.3 V or 2.5 V or 1.8 V.

Figure 10-2 Three-Supply Configuration

There is no requirement for the sequence of the supplies when operating in two-supply mode.

When operating in three-supply mode, the 1.8-V VDDA1P8 supply must be stable within 25 ms of the 2.5-V VDDA2P5 supply ramping up. There is no sequencing requirement for other supplies when operating in three-supply mode.

When powering down the DP83867, the 1.8-V supply should be brought down before the 2.5-V supply.

Figure 10-3 Three-Supply Mode Power Supply Sequence Diagram