The undervoltage lockout (UVLO) circuit monitors the input and bias voltage (V_IN and V_BIAS, respectively) to prevent the device from turning on before V_IN and V_BIAS rise above the lockout voltage. The UVLO circuit also disables the output of the device when V_IN or V_BIAS fall below the lockout voltage. The UVLO circuit responds quickly to glitches on V_IN or V_BIAS and attempts to disable the output of the device if either of these rails collapse. As a result of the fast response time of the input supply UVLO circuit, fast and short line transients well below the input supply UVLO falling threshold can cause momentary glitches when asserted or when recovered from the transient. See the Section 8 section for more details.