10.1 Layout Guidelines

The high switching frequency and large switching currents of the LM27761 make the choice of layout important. Use the following steps as a reference to ensure the device is stable and maintains proper LED current regulation across its intended operating voltage and current range:

• Place CIN on the top layer (same layer as the LM27761) and as close to the device as possible. Connecting the input capacitor through short, wide traces to both the VIN and GND pins reduces the inductive voltage spikes that occur during switching which can corrupt the VIN line.
• Place CCPOUT on the top layer (same layer as the LM27761) and as close to the VOUT and GND pins as possible. The returns for both CIN and CCPOUT must come together at one point, as close to the GND pin as possible. Connecting CCPOUT through short, wide traces reduces the series inductance on the VCPOUT and GND pins that can corrupt the VCPOUT and GND lines and cause excessive noise in the device and surrounding circuitry.
• Place C1 on top layer (same layer as the LM27761) and as close to the device as possible. Connect the flying capacitor through short, wide traces to both the C1+ and C1– pins.
• Place COUT on the top layer (same layer as the LM27761) and as close to the VOUT pin as possible. For best performance the ground connection for COUT must connect back to the GND connection at the thermal pad of the device.
• Place R1 and R2 on the top layer (same layer as LM27761) and as close to the VFB pin as possible. For best performance the ground connection of R2 must connect back to the GND connection at the thermal pad of the device.

Connections using long trace lengths, narrow trace widths, or connections through vias must be avoided. These add parasitic inductance and resistance that results in inferior performance, especially during transient conditions.

10.2 Layout Example

Figure 23. LM27761 Layout Example