ZHCSFB4A July 2016 – January 2024 DS90UB964-Q1
PRODUCTION DATA
The DS90UB964-Q1 implements an I2C target capable of operation supporting the Standard, Fast, and Fast-plus modes of operation allowing I2C operation at up to 1MHz clock frequencies. Local I2C transactions to access DS90UB964-Q1 registers can be conducted 2ms after power supplies are stable and PDB is brought high. For accesses to local registers, the I2C Target operates without stretching the clock. The primary I2C target address is set through the IDx pin. The primary I2C target address is stored in the I2C Device ID register at address 0x0. In addition to the primary I2C target address, the DS90UB964-Q1 can be programmed to respond to up to four other I2C addresses (reg 0xF8-0xFB). The four RX Port ID addresses provide direct access to the Receive Port registers without the need to set the paging controls normally required to access the port registers.