Operate the UCC2895x-Q1 controller from a V_DD rail within the limits given in the Section 5.3 section of this data sheet. To avoid the possibility that the controller might stop switching, do not allow the V_DD to fall into the UVLO_FTH range. To minimize power dissipation in the controller, ensure that V_DD is not unnecessarily high. Maintaining V_DD at 12V is a good compromise between these competing constraints. The gate drive outputs from the controller deliver large-current pulses into their loads. This indicates the need for a low-ESR decoupling capacitor to be connected as directly as possible between the V_DD and GND terminals.

TI recommends ceramic capacitors with stable dielectric characteristics over temperature, such as X7R. Avoid capacitors which have a large drop in capacitance with applied DC voltage bias. For example, use a component that has a low-voltage co-efficient of capacitance. The recommended decoupling capacitance is 1μF, X7R, with at least a 25V rating with a 0.1µF NPO capacitor in parallel.