ZHCSFN1A
November 2016 – January 2022
UCC20520
PRODUCTION DATA
1
特性
2
应用
3
说明
4
Revision History
5
Pin Configuration and Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Power Ratings
6.6
Insulation Specifications
6.7
Safety-Related Certifications
6.8
Safety-Limiting Values
6.9
Electrical Characteristics
6.10
Switching Characteristics
6.11
Insulation Characteristics Curves
6.12
Typical Characteristics
7
Parameter Measurement Information
7.1
Propagation Delay and Pulse Width Distortion
7.2
Rising and Falling Time
7.3
PWM Input and Disable Response Time
7.4
Programable Dead Time
7.5
CMTI Testing
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
VDD, VCCI, and Under Voltage Lock Out (UVLO)
8.3.2
Input and Output Logic Table
8.3.3
Input Stage
8.3.4
Output Stage
8.3.5
Diode Structure in UCC20520
8.4
Device Functional Modes
8.4.1
Disable Pin
8.4.2
Programmable Dead Time (DT) Pin
8.4.2.1
Tying the DT Pin to VCC
8.4.2.2
DT Pin Left Open or Connected to a Programming Resistor between DT and GND Pins
8.4.2.3
39
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Designing PWM Input Filter
9.2.2.2
Select External Bootstrap Diode and its Series Resistor
9.2.2.3
Gate Driver Output Resistor
9.2.2.4
Estimate Gate Driver Power Loss
9.2.2.5
Estimating Junction Temperature
9.2.2.6
Selecting VCCI, VDDA/B Capacitor
9.2.2.6.1
Selecting a VCCI Capacitor
9.2.2.6.2
Selecting a VDDA (Bootstrap) Capacitor
9.2.2.6.3
Select a VDDB Capacitor
9.2.2.7
Dead Time Setting Guidelines
9.2.2.8
Application Circuits with Output Stage Negative Bias
9.2.2.9
56
9.2.3
Application Curves
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
接收文档更新通知
11.3
支持资源
11.3.1
Certifications
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
术语表
9.2.2
Detailed Design Procedure
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