10.5.2.3 Inrush Current

To determine how much inrush current is caused by the C_L capacitor, use Equation 9.

Equation 9.

where

• I_INRUSH is the amount of inrush caused by C_L
• C_L is the capacitance on VOUT
• dt is the Output Voltage rise time during the ramp up of VOUT when the device is enabled
• dV_OUT is the change in V_OUT during the ramp up of VOUT when the device is enabled

The appropriate rise time can be calculated using the design requirements and the inrush current equation. As we calculate the rise time (measured from 10% to 90% of V_OUT), we account for this in our d_VOUT parameter (80% of V_OUT = 9.6 V) as shown in Equation 10 and Equation 11.

To ensure an inrush current of less than 400 mA, choose a CT value that yields a rise time of more than 528 μs. Consulting Table 2 at V_IN = 12 V, CT = 4700 pF provides a typical rise time of 957 μs. Using this rise time and voltage into Equation 9, yields Equation 12 and Equation 13.

An appropriate C_L value must be placed on VOUT such that the I_MAX and I_PLS specifications of the device are not violated.