ZHCSG17B January 2017 – July 2019 LMK04610
PRODUCTION DATA.
LMK0461x device is programmed using 24-bit registers. Each register consists of a 1-bit command field (R/W), a 15-bit address field (A14 to A0) and a 8-bit data field (D7 to D0). The contents of each register is clocked in MSB first (R/W), and the LSB (D0) last. During programming, the CS* signal is held low. The serial data is clocked in on the rising edge of the SCK signal. After the LSB is clocked in, the CS* signal goes high to latch the contents into the shift register. TI recommends programming registers in numeric order -- for example, 0x000 to 0x1FFF -- to achieve proper device operation. Each register consists of one or more fields that control the device functionality. See the electrical characteristics and Figure 1 for timing details.
R/W bit = 0 is for SPI write. R/W bit = 1 is for SPI read.