米6体育平台手机版

ZHCSG17B January 2017 – July 2019 LMK04610

PRODUCTION DATA.

7.11 Oscillator Output Characteristics (OSCout)

3.135 V < VDD_PLL2OSC, VDD_PLL1, VDD_PLL2CORE, VDD_CORE < 3.465 V;
1.7 V < VDD_IO, VDD_OSC, VDDO_x < 3.465 V; –40°C < T_A < 85°C and T_PCB ≤ 105°C. Typical values at VDD_PLL2OSC, VDD_PLL1, VDD_PLL2CORE, VDD_CORE = 3.3 V, VDD_IO, VDD_OSC, VDDOx = 1.8 V, T_A = 25°C, at the Recommended Operating Conditions and are not assured.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
f_CLKout	Output frequency⁽¹⁾⁽³⁾	2-pF load, 1.8-V LVCMOS⁽²⁾			200	MHz
		4-mA HSDS⁽²⁾			800
		8-mA HSDS⁽²⁾			1000
		16-mA HCSL⁽²⁾			400
ODC	Output duty cycle	2-pF load, 1.8-V LVCMOS	45%	50%	55%
		4-mA HSDS	45%	50%	55%
		8-mA HSDS	45%	50%	55%
		16-mA HCSL	45%	50%	55%
T_R / T _F	Output rise/fall time	20% to 80%, C_L = 2 pF, 1.8 V LVCMOS		156		ps
		80% to 20%, C_L = 2 pF, 1.8 V LVCMOS		273
		< 300 MHz, 20 % to 80 %, R_L = 100 Ω, 4-mA HSDS		176	300
		> 300 MHz, 20 % to 80 %, R_L = 100 Ω, 4-mA HSDS		152
		< 300 MHz, 20% to 80%, R_L = 100 Ω, 8-mA HSDS		183	300
		> 300 MHz, 20 % to 80 %, R_L = 100 Ω, 8-mA HSDS		138
		20 % to 80 %, R_L = 100 Ω, 16-mA HCSL		135
V_OH	Output high voltage	1-mA load, 1.8-V LVCMOS	1.44			V
		4-mA HSDS	0.46		0.7
		8-mA HSDS	0.82		1.19
		16-mA HCSL	0.61		0.89
V_OL	Output low voltage	1-mA load, 1.8-V LVCMOS			0.36	V
		4-mA HSDS	0.1		0.22
		8-mA HSDS	0.11		0.24
		16-mA HCSL		0.02	0.06
V_OD,pp	Differential output voltage	4-mA HSDS	600	775	950	mVpp
		8-mA HSDS	1240	1548
		16-mA HCSL	1000	1360
I_OH	Output high current (source)	V_OUT = 2 pF to GND, 1.8-V LVCMOS		–25		mA
I_OL	Output low current (sink)	V_OUT = 2 pF to GND, 1.8-V LVCMOS		26		mA
V_OX	Output common mode	DC-Coupled, 4-mA HSDS	0.1	0.34	0.45	V
		DC-Coupled, 8-mA HSDS	0.3	0.55	0.7
		DC-Coupled, 16-mA HCSL		0.34
R_OUT	Output impedance	I_OUT at V_OUT = 0.9 V		67		Ω

(1) Assured by characterization. ATE tested to 122.88 MHz.

(2) See test load description in Output Termination Scheme.

(3) OSCout Divider maximum input frequency is 1.5 GHz.