ZHCSGA6A February 2017 – June 2017 ADS114S06 , ADS114S08
PRODUCTION DATA.
The following list shows a pseudo code sequence with the required steps to set up the device and the microcontroller that interfaces to the ADC in order to take subsequent readings from the ADS114S0x in continuous conversion mode. The dedicated DRDY pin is used to indicate availability of new conversion data.
Power-up so that all supplies reach minimum operating levels;
Delay for a minimum of 2.2 ms to allow power supplies to settle and power-up reset to complete;
Configure the SPI interface of the microcontroller to SPI mode 1 (CPOL = 0, CPHA =1);
If the CS pin is not tied low permanently, configure the microcontroller GPIO connected to CS as an
output;
Configure the microcontroller GPIO connected to the DRDY pin as a falling edge triggered interrupt
input;
Set CS to the device low;
Delay for a minimum of td(CSSC);
Send the RESET command (06h) to make sure the device is properly reset after power-up; //Optional
Delay for a minimum of 4096 · tCLK;
Read the status register using the RREG command to check that the RDY bit is 0; //Optional
Clear the FL_POR flag by writing 00h to the status register; //Optional
Write the respective register configuration with the WREG command;
For verification, read back all configuration registers with the RREG command;
Send the START command (08h) to start converting in continuous conversion mode;
Delay for a minimum of td(SCCS);
Clear CS to high (resets the serial interface);
Loop
{
Wait for DRDY to transition low;
Take CS low;
Delay for a minimum of td(CSSC);
Send the RDATA command;
Send 16 SCLK rising edges to read out conversion data on DOUT/DRDY;
Delay for a minimum of td(SCCS);
Clear CS to high;
}
Take CS low;
Delay for a minimum of td(CSSC);
Send the STOP command (0Ah) to stop conversions and put the device in standby mode;
Delay for a minimum of td(SCCS);
Clear CS to high;