ZHCSGB0B November 2017 – November 2020 LM5145
PRODUCTION DATA
A high power density, high-efficiency regulator solution uses TI NexFET™ Power MOSFETs, such as CSD18563Q5A (60-V, 6-mΩ MOSFET in a SON 5-mm × 6-mm package), together with a low-DCR inductor and all-ceramic capacitor design. The design occupies 30 mm × 15 mm on a single-sided PCB. The overcurrent (OC) setpoint in this design is set at 14 A based on the resistor RILIM and the 6-mΩ RDS(on) of the low-side MOSFET (typical at TJ = 25°C and VGS = 7.5 V). The 12-V output is connected to VCC through a diode, D1, to reduce IC bias power dissipation.
The selected buck converter powertrain components are cited in Table 9-8, including power MOSFETs, buck inductor, input and output capacitors, and ICs. Use the LM5145 Quickstart Calculator to find compensation components that are selected based on a target loop crossover frequency of 40 kHz and phase margin greater than 55°. The output voltage soft-start time is 4 ms based on the selected soft-start capacitance, CSS, of 33 nF.
REFERENCE DESIGNATOR | QTY | SPECIFICATION | MANUFACTURER | PART NUMBER |
---|---|---|---|---|
CIN | 5 | 4.7 µF, 100 V, X7S, 1210, ceramic | TDK | C3225X7S2A475M |
Murata | GRM32DC72A475KE01L | |||
Taiyo Yuden | HMK325C7475MN-TE | |||
COUT | 5 | 47 µF, 16 V, X5R, 1210, ceramic | Murata | GRM32ER61C476KE15K |
Würth Electronik | 885012109011 | |||
7 | 22 µF, 25 V, X7R, 1210, ceramic | Murata | GRM32ER71E226KE15L | |
Taiyo Yuden | TMK325B7226MM-TR | |||
TDK | C3225X7R1E226M | |||
LF | 1 | 4.7 µH, 7.8 mΩ, 25 A, 13.45 × 12.6 × 6.3 mm | Cyntec | CMLS136E-4R7MS |
4.7 µH, 6.5 mΩ, 27 A, 12.5 × 12.5 × 6.2 mm | Würth Electronik | WE-LHMI 744373965047 | ||
4.7 µH, 9.75 mΩ, 25 A, 11.3 × 10 × 6 mm | Coilcraft | XAL1060-472ME | ||
Q1, Q2 | 2 | 60 V, 6 mΩ, MOSFET, SON 5 × 6 | Texas Instruments | CSD18563Q5A |
U1 | 1 | Wide VIN synchronous buck controller | Texas Instruments | LM5145RGYR |
U2 | 1 | Ultra-low noise and high-PSRR LDO | Texas Instruments | LP38798SD-ADJ |
As shown in Figure 9-20, a 2.2-Ω resistor in series with CBST is used to slow the turn-on transition of the high-side MOSFET, reducing the spike amplitude and ringing of the SW node voltage and minimizing the possibility of Cdv/dt-induced shoot-through of the low-side MOSFET. If needed, place an RC snubber (for example, 2.2 Ω and 100 pF) close to the drain (SW node) and source (PGND) terminals of the low-side MOSFET to further attenuate any SW node voltage overshoot and/or ringing. Please refer to the application note Reduce Buck Converter EMI and Voltage Stress by Minimizing Inductive Parasitics for more detail.