7.5.2.3 Transferring Data

Every byte put on the SDA line must be eight bits long, with the most significant bit (MSB) transferred first. Each byte of data has to be followed by an acknowledge bit. The acknowledge related clock pulse is generated by the master. The master releases the SDA line (HIGH) during the acknowledge clock pulse. The LM36010 pulls down the SDA line during the 9th clock pulse, signifying an acknowledge. The LM36010 generates an acknowledge after each byte is received. There is no acknowledge created after data is read from the device.

After the START condition, the I²C master sends a chip address. This address is seven bits long followed by an eighth bit which is a data direction bit (R/W). The LM36010 7-bit address is 0x64. For the eighth bit, a 0 indicates a WRITE, and a 1 indicates a READ. The second byte selects the register to which the data is written. The third byte contains data to write to the selected register.

Figure 35. Write Cycle W = Write (SDA = 0) R = Read (SDA = 1) Ack = Acknowledge
(SDA Pulled Down by Either Master or Slave) ID = Chip Address, 64h for LM36010