ZHCSGL2E December   2016  – December 2023 LMK62A2-100M , LMK62A2-150M , LMK62A2-156M , LMK62A2-200M , LMK62A2-266M , LMK62E0-156M , LMK62E2-100M , LMK62E2-156M , LMK62I0-100M , LMK62I0-156M

PRODUCTION DATA  

  1.   1
  2. 特性
  3. 应用
  4. 说明
  5. Pin Configuration and Functions
  6. Specifications
    1. 5.1  Absolute Maximum Ratings
    2. 5.2  ESD Ratings
    3. 5.3  Recommended Operating Conditions
    4. 5.4  Thermal Information
    5. 5.5  Electrical Characteristics - Power Supply
    6. 5.6  LVPECL Output Characteristics
    7. 5.7  LVDS Output Characteristics
    8. 5.8  HCSL Output Characteristics
    9. 5.9  OE Input Characteristics
    10. 5.10 Frequency Tolerance Characteristics
    11. 5.11 Power-On/Reset Characteristics (VDD)
    12. 5.12 PSRR Characteristics
    13. 5.13 PLL Clock Output Jitter Characteristics
    14. 5.14 Additional Reliability and Qualification
  7. Parameter Measurement Information
    1. 6.1 Device Output Configurations
  8. Application and Implementation
    1. 7.1 Power Supply Recommendations
    2. 7.2 Layout
      1. 7.2.1 Layout Guidelines
        1. 7.2.1.1 Ensuring Thermal Reliability
        2. 7.2.1.2 Best Practices for Signal Integrity
        3. 7.2.1.3 Recommended Solder Reflow Profile
  9. Device and Documentation Support
    1. 8.1 接收文档更新通知
    2. 8.2 支持资源
    3. 8.3 Trademarks
    4. 8.4 静电放电警告
    5. 8.5 术语表
  10. Revision History
  11. 10Mechanical, Packaging, and Orderable Information

LVDS Output Characteristics

VDD = 3.3 V ± 5%, TA = –40°C to 85°C(1)
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
fOUTOutput frequency(1)400MHz
VODOutput voltage swing (VOH - VOL)(1)300390480mV
VOUT, DIFF, PPDifferential output peak-to-peak swing2 x |VOD|V
VOSOutput common-mode voltage1.1251.21.375V
tR / tFOutput rise/fall time (20% to 80%)(2)260350ps
ODCOutput duty cycle(2)45%55%
ROUTDifferential output impedance107Ω
An output frequency over fOUT max spec is possible, but output swing may be less than VOD min spec.
Ensured by characterization.