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ZHCSGP5C August 2017 – February 2022 TIC12400-Q1

PRODUCTION DATA

8.7 Programming Guidelines

When configuring the TIC12400-Q1, it is critical to follow the programming guideline summarized below (see Table 8-59) to ensure proper behavior of the device:

Table 8-59 TIC12400-Q1 Programming Guidelines

Category	Programming requirement
Threshold setup: Continuous mode Regular polling mode Matrix mode (non-matrix inputs)	THRES2B ≥ THRES2A (for IN12 to IN17) THRES3C ≥ THRES3B ≥ THRES3A (for IN18 to IN22) THRES9 ≥ THRES8 ≥ THRES3C ≥ THRES3B ≥ THRES3A (for IN23)
Threshold setup: V_S measurement	VS0_THRES2B ≥ VS0_THRES2A VS1_THRES2B ≥ VS1_THRES2A
4×4 Matrix mode (MATRIX [4:3] = 2'b01)	POLL_EN=1 IN_EN[7:4]=4’b1111; IN_EN[13:10]= 4’b1111 MODE[7:4] = 4’b0000; MODE[13:10] = 4’b0000 CS_SELECT[7:4]= 4’b1111; CS_SELECT[13:10]= 4’b0000 IWETT(CSI) > IWETT (CSO): WC_CFG0[20:18] < WC_CFG0[8:6] WC_CFG0[23:21] < WC_CFG0[11:9] WC_CFG1[2:0] > WC_CFG0[14:12] If TW event is expected, CSO can only be set to 1 mA or 2 mA: If WC_CFG0[8:6]= 3’b001: WC_CFG0[20:18]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[8:6]= 3’b010: WC_CFG0[20:18] = 3’b011 If WC_CFG0[11:9]= 3’b001: WC_CFG0[23:21]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[11:9]= 3’b010: WC_CFG0[23:21] = 3’b011 If WC_CFG1[2:0]= 3’b001: WC_CFG0[14:12]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG1[2:0]= 3’b010: WC_CFG0[14:12] = 3’b011
5×5 Matrix mode (MATRIX [4:3] = 2'b10)	POLL_EN=1 IN_EN[8:4]= 5’b11111; IN_EN[14:10]= 5’b11111 MODE[8:4] = 5’b00000; MODE[14:10] = 5’b00000 CS_SELECT[8:4]= 5’b11111; CS_SELECT[14:10]= 5’b00000 IWETT(CSI) > IWETT (CSO): WC_CFG0[20:18] <WC_CFG0[8:6] WC_CFG0[23:21] < WC_CFG0[11:9] WC_CFG1[2:0] > WC_CFG0[14:12] WC_CFG1[5:3] > WC_CFG0[17:15] If TW event is expected, CSO can only be set to 1 mA or 2 mA: If WC_CFG0[8:6]= 3’b001: WC_CFG0[20:18]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[8:6]= 3’b010: WC_CFG0[20:18] = 3’b011 If WC_CFG0[11:9]= 3’b001: WC_CFG0[23:21]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[11:9]= 3’b010: WC_CFG0[23:21] = 3’b011 If WC_CFG1[2:0]= 3’b001: WC_CFG0[14:12]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG1[2:0]= 3’b010: WC_CFG0[14:12] = 3’b011 If WC_CFG1[5:3]= 3’b001: WC_CFG0[17:15]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG1[5:3]= 3’b010:WC_CFG0[17:15] = 3’b011
6×6 Matrix mode (MATRIX [4:3]= 2’b11)	POLL_EN=1 IN_EN[9:4]= 6’b111111; IN_EN[15:10]= 6’b111111 MODE[9:4] = 6’b000000; MODE[15:10] = 6’b000000 CS_SELECT[9:4]= 6’b111111; CS_SELECT[15:10]= 6’b000000 IWETT(CSI) > IWETT (CSO): WC_CFG0[20:18] <WC_CFG0[8:6] WC_CFG0[23:21] < WC_CFG0[11:9] WC_CFG1[2:0] > WC_CFG0[14:12] WC_CFG1[5:3] > WC_CFG0[17:15] If TW event is expected, CSO can only be set to 1 mA or 2 mA: If WC_CFG0[8:6]= 3’b001: WC_CFG0[20:18]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[8:6]= 3’b010: WC_CFG0[20:18] = 3’b011 If WC_CFG0[11:9]= 3’b001: WC_CFG0[23:21]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG0[11:9]= 3’b010: WC_CFG0[23:21] = 3’b011 If WC_CFG1[2:0]= 3’b001: WC_CFG0[14:12]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG1[2:0]= 3’b010: WC_CFG0[14:12] = 3’b011 If WC_CFG1[5:3]= 3’b001: WC_CFG0[17:15]= 3’b010, 3’b011, 3’b100, 3’b101, 3’b110, or 3’b111; If WC_CFG1[5:3]= 3’b010: WC_CFG0[17:15] = 3’b011
Clean Current Polling (if CCP_INx= 1 in the CCP_CFG1 register)	At least one input (standard or matrix) or the VS measurement has to be enabled: IN_EN_x= 1 in the IN_EN register or CONFIG [16]= 1’b1⁽¹⁾
Wetting current auto-scaling (if WC_CFG1 [22:21] != 2b’11)	The wetting current auto-scaling feature is only activated in the continuous mode: POLL_EN= 0 ⁽²⁾ The wetting current auto-scaling only applies to 10 mA or 15 mA wetting currents: WC_INx bits = 3’b100, 3’b101, 3’b110, or 3’b111 in the WC_CFG0 and WC_CFG1 registers.⁽²⁾
Wetting current diagnostic (If CONFIG [21:18] != 4b’0000)	At least one channel has to be enabled from IN0 to IN3 (IN_EN[3:0] != 4b’0000) Inputs IN0 to IN3 need to be configured to ADC input mode: MODE[3:0] = 4’b1111 Inputs IN0 and IN1 need to be configured to CSO: CS SELECT [1:0]= 2b’00 Inputs IN2 and IN3 need to be configured to CSI: CS SELECT [3:2]= 2b’11
Continuous mode Standard polling mode	t_{POLL_TIME} and t_{POLL_ACT_TIME} settings have to meet the below requirement: t_{POLL_TIM}_E ≥ 1.3 ×[ t_{POLL_ACT_TIME} + n × 24 μs + 10 μs]⁽³⁾⁽⁴⁾ n: the number of enabled channels configured in register IN_EN t_{POLL_TIME}: timing setting configured in CONFIG[4:1] t_{POLL_ACT_TIME}: timing setting configured in CONFIG[8:5]
Matrix polling mode	t_{POLL_TIME} ,t_{POLL_ACT_TIME}, and t_{POLL_ACT_TIME_M} settings have to meet the below requirement: t_{POLL_TIME} > 1.3 × [ m × t_{POLL_ACT_TIME_M} + t_{POLL_ACT_TIME} + n × 24 μs + 10 μs] ⁽³⁾⁽⁴⁾ n: the number of enabled channels configured in register IN_EN m: 16 for 4×4 matrix; 25 for 5×5 matrix; 36 for 6×6 matrix t_{POLL_TIME}: timing setting configured in CONFIG[4:1] t_{POLL_ACT_TIME_M}: timing setting configured in MATRIX[2:0] t_{POLL_ACT_TIME}: timing setting configured in CONFIG[8:5]

(1) This is a soft requirement to take advantage of the clean current polling feature. The feature takes no effect otherwise.

(2) These are soft requirements to take advantage of the wetting current auto-scaling feature. The feature takes no effect otherwise.

(3) If WCD is enabled, add additional 96 μs

(4) If CCP is enabled, add tCCP_TRAN +tCCP_TIME, where tCCP_TIME is the timing setting configured in CCP_CFG0[6:4]