ZHCSGQ7C September 2017 – May 2019 TDP142
PRODUCTION DATA.
The TDP142 has (I2C_EN, A0, and DPEQ[1:0]) 4-level inputs pins that are used to control the equalization gain and place TDP142 into different modes of operation. These 4-level inputs utilize a resistor divider to help set the 4 valid levels and provide a wider range of control settings. There are internal pull-up and pull-down and combine with the external resistor connection to achieve the desired voltage level.
| LEVEL | SETTINGS |
|---|---|
| 0 | Option 1: Tie 1 kΩ 5% to GND.
Option 2: Tie directly to GND. |
| R | Tie 20 kΩ 5% to GND. |
| F | Float (leave pin open) |
| 1 | Option 1: Tie 1 kΩ 5% to VCC.
Option 2: Tie directly to VCC. |
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NOTE
All four-level inputs are latched on rising edge of internal reset. After tcfg_hd, the internal pull-up and pull-down resistors will be isolated in order to save power.