7.3.2 Reference Path

The reference path consists of an OSCin doubler (OSC_2X), Pre-R divider (PLL_R_PRE), Multiplier (MULT), and a Post-R divider (PLL_R).

Figure 31. Reference Path

The Doubler allows one to double the input reference frequency up to 250 MHz. The Doubler adds minimal noise and is useful for raising the phase detector frequency for better phase noise. The Doubler can also be used to avoid spurs. The Doubler uses both the rising and falling edges of the input signal, so the input signal must have 50% duty cycle if the Doubler is enabled. Note that the Multiplier cannot be used if the Doubler is engaged.

The Pre-R divider can help reduce input frequency so that the Multiplier can be used and the maximum 200-MHz input frequency limitation of the Post-R divider can be met.

The Multiplier multiplies the frequency up under the allowable multiplications of 3, 4, 5, 6, and 7. In combination with the Pre-R and Post-R dividers, the Multiplier offers the flexibility to shift the phase detector frequency away from frequencies that may create integer boundary spurs with the VCO and the output frequencies. Be aware that unlike the Doubler, the Multiplier degrades the PLL figure of merit. This degradation would only matter, however, for a very clean reference oscillator input and if the loop bandwidth was wide. The user should not use the Doubler while using the Multiplier. The Multiplier is bypassed if its value is set to 1.

The Post-R divider can be used to further divide down the frequency to the phase detector frequency. When it is used (PLL_R > 1), the input frequency to this divider is limited to 200 MHz.

Use Equation 1 to calculate the phase detector frequency, f_PD.

Table 1 summarizes the usage boundaries of these functional blocks in the reference path.