ZHCSHD5A January 2018 – October 2018 ADS112U04
PRODUCTION DATA.
As shown in Figure 84, the bridge excitation voltage is simultaneously used as the reference voltage for the ADC to implement a ratiometric bridge measurement. With this configuration, any drift in excitation voltage also shows up on the reference voltage, consequently canceling out drift error. Either the dedicated reference inputs can be used, or the analog supply can be used as the reference if the supply is used to excite the bridge.
The PGA offers gains up to 128, which helps amplify the small differential bridge output signal to make optimal use of the ADC full-scale range. Using a symmetrical bridge with the excitation voltage equal to the supply voltage of the device ensures that the output signal of the bridge meets the absolute input voltage requirement of the PGA.
Using a 3-mV/V load cell with a 5-V excitation yields a maximum differential voltage at the ADC inputs of VINMAX = 15 mV at maximum load. Equation 29 then calculates the maximum gain that can be used.
Accordingly Gain = 128 is used in this example.
A first-order differential and common-mode RC filter (RF1, RF2, CDIF1, CCM1, and CCM2) is placed on the ADC inputs. The reference has an additional capacitor CDIF2 to limit reference noise. Care must be taken to maintain a limited amount of filtering or the measurement is no longer ratiometric.
The device is capable of 16-bit, noise-free resolution using a gain of 128 at 20 SPS for the specified reference voltage. Accordingly, the device is able to resolve signals as small as one LSB. Use Equation 30 to calculate the LSB size:
To find the total number of counts available for the bridge measurement, the maximum output voltage is divided by the LSB value. Dividing 10 mV by 1.192 µV equates to 8389 total counts available, which meets the design parameter of 8000 counts.
Table 29 shows the register settings for this design.
REGISTER | SETTING | DESCRIPTION |
---|---|---|
00h | 4Eh | AINP = AIN1, AINN = AIN2, gain = 128, PGA enabled |
01h | 0Ah | DR = 20 SPS, normal mode, continuous conversion mode, external reference |
02h | 98h | Conversion data counter disabled, data integrity disabled, burnout current sources disabled, IDACs off |
03h | 00h | No IDACs used, manual data read mode |
04h | 48h | GPIO2/DRDY pin configured as a DRDY output |