ZHCSHF4J
May 2004 – January 2018
TPS51116
PRODUCTION DATA.
1
特性
2
应用
3
说明
Device Images
3.1
典型应用
4
修订历史记录
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Dissipation Ratings
6.5
Thermal Information
6.6
Electrical Characteristics
6.7
Typical Characteristics
7
Detailed Description
7.1
Overview
7.2
Functional Block Diagram
7.3
Feature Description
7.3.1
VDDQ SMPS, Light Load Condition
7.3.2
Low-Side Driver
7.3.3
High-Side Driver
7.3.4
Current Sensing Scheme
7.3.5
PWM Frequency and Adaptive On-Time Control
7.3.6
VDDQ Output Voltage Selection
7.3.7
VTT Linear Regulator and VTTREF
7.3.8
Controling Outputs Using the S3 and S5 Pins
7.3.9
Soft-Start Function and Powergood Status
7.3.10
VDDQ and VTT Discharge Control
7.3.11
Current Protection for VDDQ
7.3.12
Current Protection for VTT
7.3.13
Overvoltage and Undervoltage Protection for VDDQ
7.3.14
Undervoltage Lockout (UVLO) Protection, V5IN (PWP), V5FILT (RGE)
7.3.15
Input Capacitor, V5IN (PWP), V5FILT (RGE)
7.3.16
Thermal Shutdown
7.4
Device Functional Modes
7.4.1
VDDQ SMPS, Dual PWM Operation Modes
7.4.2
Current Mode Operation
7.4.3
D-CAP™ Mode Operation
8
Application and Implementation
8.1
Application Information
8.2
DDR3 Application With Current Mode
8.2.1
Design Requirements
8.2.2
Detailed Design Procedure
8.2.2.1
Pin Connections
8.2.2.2
Choose the inductor
8.2.2.3
Choose rectifying (low-side) MOSFET
8.2.2.4
Choose output capacitance
8.2.2.5
Determine f0 and calculate RC
8.2.2.6
Calculate CC2
8.2.2.7
Calculate CC.
8.2.2.8
Determine the value of R1 and R2.
8.2.3
Application Curves
8.3
DDR3 Application With D−CAP™ Mode
8.3.1
Design Requirements
8.3.2
Detailed Design Procedure
8.3.2.1
Pin Connections
8.3.2.2
Choose the Components
8.3.3
Application Curves
9
Power Supply Recommendations
10
Layout
10.1
Layout Guidelines
10.2
Layout Example
11
器件和文档支持
11.1
接收文档更新通知
11.2
社区资源
11.3
商标
11.4
静电放电警告
11.5
Glossary
12
机械、封装和可订购信息
6.7
Typical Characteristics
All data in the following graphs are measured from the PWP packaged device.
Figure 1.
V5IN Supply Current vs Junction Temperature
DDR2
V
VTT
= 0.3 V
Figure 3.
V5IN Supply Current vs VTT Current
Figure 5.
CS Current vs Junction Temperature
Figure 7.
VTT Discharge Current vs Junction Temperature
DCAP Mode
I
VDDQ
= 7 A
Figure 9.
Switching Frequency vs Input Voltage
DDR
V
IN
= 12 V
DCAP Mode
Figure 11.
VDDQ Load Regulation
DDR
Figure 13.
VTT Load Regulation
DDR3
V
VLDOIN
= 1. 5 V
Figure 15.
VTT Load Regulation
DDR
D021
Figure 17.
VTTREF Load Regulation
DDR3
Figure 19.
VTTREF Load Regulation
DDR
V
VDDQ
= 2.5 V
f
SW
= 400 kHz
Figure 21.
VDDQ Efficiency vs VDDQ Current
Heavy Load
Figure 23.
Ripple Waveforms
Figure 25.
VTT Load Transient Response
Figure 27.
Soft-Start Waveforms Tracking Discharge
Current mode
Figure 29.
VDDQ Bode Plot
DDR2
Sink
Figure 31.
VTT Bode Plot
Figure 2.
V5IN Shutdown Current vs Junction Temperature
Figure 4.
VLDOIN Supply Current vs Junction Temperature
Figure 6.
VDDQ Discharge Current vs Junction Temperature
Figure 8.
Overvoltage and Undervoltage Threshold vs Junction Temperature
DCAP Mode
V
IN
=12 V
Figure 10.
Switching Frequency vs I
VDDQ
Output Current
DDR2
DCAP Mode
Figure 12.
VDDQ Line Regulation
DDR2
Figure 14.
VTT Load Regulation
DDR4
Figure 16.
VTTREF Output Voltage vs Output Current
DDR2
Figure 18.
VTTREF Load Regulation
DDR4
Figure 20.
VTTREF Load Regulation
DDR2
V
VDDQ
= 1.8 V
f
SW
= 400 kHz
Figure 22.
VDDQ Efficiency vs VDDQ Current
Figure 24.
VDDQ Load Transient Response
Figure 26.
VDDQ, VTT, and VTTREF Start-Up Waveforms
Figure 28.
Soft-Stop Waveforms Non-Tracking Discharge
DDR2
Source
Figure 30.
VTT Bode Plot
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