The AWR1243 device uses MIPI D-PHY / CSI2-based format to transfer the raw ADC samples to the external MCU. This is shown in Figure 9-5.

• Supports four data lanes
• CSI-2 data rate scalable from 150 Mbps to 600 Mbps per lane
• Virtual channel based
• CRC generation

Frame Start – CSi2 VSYNC Start Short PacketLine Start – CSI2 HSYNC Start Short PacketLine End – CSI2 HSYNC End Short PacketFrame End – CSi2 VSYNC End Short Packet

Figure 9-5 CSI-2 Transmission Format

The data payload is constructed with the following three types of information:

• Chirp profile information
• The actual chirp number
• ADC data corresponding to chirps of all four channels
  • Interleaved fashion
• Chirp quality data (configurable)

The payload is then split across the four physical data lanes and transmitted to the receiving D-PHY. The data packet packing format is shown in Figure 9-6

Figure 9-6 Data Packet Packing Format for 12-Bit Complex Configuration