The AWR1243 device communicates with the host radar processor over the following main interfaces:

• Reference Clock – Reference clock available for host processor after device wakeup
• Control – 4-port standard SPI (peripheral) for host control along with HOST INTR pin for async events.. All radio control commands (and response) flow through this interface.
• Data – High-speed serial port following the MIPI CSI2 format. Four data and one clock lane (all differential). Data from different receive channels can be multiplexed on a single data lane to optimize board routing. This is a unidirectional interface used for data transfer only.
• Reset – Active-low reset for device wakeup from host
• Out-of-band interrupt
• Error – Used for notifying the host in case the radio controller detects a fault