7.4.2 Simple Small Signal Model for Peak Current Mode Control

Figure 32 is a simple small signal model that can be used to understand how to design the frequency compensation. The TPS54418 device power stage can be approximated to a voltage controlled current source (duty cycle modulator) supplying current to the output capacitor and load resistor. The control to output transfer function is shown in Equation 7 and consists of a dc gain, one dominant pole and one ESR zero. The quotient of the change in switch current and the change in COMP pin voltage (node c in Figure 31) is the power stage transconductance. The g_M for the TPS54418 device is 13 A/V. The low frequency gain of the power stage frequency response is the product of the transconductance and the load resistance as shown in Equation 8. As the load current increases and decreases, the low frequency gain decreases and increases, respectively. This variation with load may seem problematic at first glance, but the dominant pole moves with load current [see Equation 9]. The combined effect is highlighted by the dashed line in the right half of Figure 33. As the load current decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same for the varying load conditions which makes it easier to design the frequency compensation.

Figure 32. Simple Small Signal Model

Figure 33. Frequency Response

Equation 7.

Equation 8.

Equation 9.

Equation 10.