7.1 Overview

The TPS75003 device is a power management IC (PMIC) with two buck controllers and one integrated LDO regulator. The three voltage regulators have independent enable pins for flexible power sequence timing, and all of the output voltages are set by external feedback resistor dividers. The independent power regulators can be wired in parallel, in series, or connected to separate input voltages as needed to meet the requirements of the application.

The two buck controllers are identical and operate over a input voltage range of 2.2 V to 6.5 V to supply a load with an externally configurable output voltage with up to 3-A of current. The buck controllers drive the gate of a single PMOS FET in an asynchronous buck regulator architecture. The use of a PMOS FET lets the buck regulator operate with 100% duty cycle when the input voltage is approximately equal to or less than the desired output voltage. The buck controllers have an eternally configurable current sense feature to limit the output current and protect the PMOS FET. The buck controllers have an externally configurable soft-start feature that ramps the voltage and meet the timing requirements of the load.

The LDO regulator integrates the FET and operates over the same input voltage range of 2.2 V to 6.5 V to supply a load with an externally configurable output voltage with up to 300-mA of current. The LDO regulator includes integrated current limiting and thermal protection features. The LDO regulator also has an externally configurable soft-start feature to ramp the voltage to meet desired timing requirements.