7.1 Overview

The LM26420-Q1 is a constant frequency dual PWM buck synchronous regulator device that can supply two loads at up to 2 A each. The regulator has a preset switching frequency of 2.2 MHz. This high frequency allows the LM26420-Q1 to operate with small surface mount capacitors and inductors, resulting in a DC/DC converter that requires a minimum amount of board space. The LM26420-Q1 is internally compensated, so it is simple to use and requires few external components. The LM26420-Q1 uses current-mode control to regulate the output voltage. The following operating description of the LM26420-Q1 refers to the Functional Block Diagram, which depicts the functional blocks for one of the two channels, and to the waveforms in Figure 26. The LM26420-Q1 supplies a regulated output voltage by switching the internal PMOS and NMOS switches at constant frequency and variable duty cycle. A switching cycle begins at the falling edge of the reset pulse generated by the internal clock. When this pulse goes low, the output control logic turns on the internal PMOS control switch (TOP Switch). During this on-time, the SW pin voltage (V_SW) swings up to approximately V_IN, and the inductor current (I_L) increases with a linear slope. I_L is measured by the current sense amplifier, which generates an output proportional to the switch current. The sense signal is summed with the regulator’s corrective ramp and compared to the error amplifier’s output, which is proportional to the difference between the feedback voltage and V_REF. When the PWM comparator output goes high, the TOP Switch turns off and the NMOS switch (BOTTOM Switch) turns on after a short delay, which is controlled by the Dead-Time-Control Logic, until the next switching cycle begins. During the top switch off-time, inductor current discharges through the BOTTOM Switch, which forces the SW pin to swing to ground. The regulator loop adjusts the duty cycle (D) to maintain a constant output voltage.

Figure 26. LM26420-Q1 Basic Operation of the PWM Comparator