ZHCSI90E December   2017  – October 2019 ISO1042

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     703A I2C
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions—16 Pins
    2.     Pin Functions—8 Pins
  6. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Transient Immunity
    4. 6.4  Recommended Operating Conditions
    5. 6.5  Thermal Information
    6. 6.6  Power Ratings
    7. 6.7  Insulation Specifications
    8. 6.8  Safety-Related Certifications
    9. 6.9  Safety Limiting Values
    10. 6.10 Electrical Characteristics - DC Specification
    11. 6.11 Switching Characteristics
    12. 6.12 Insulation Characteristics Curves
    13. 6.13 Typical Characteristics
  7. 7 Parameter Measurement Information
    1. 7.1 Test Circuits
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 CAN Bus States
      2. 8.3.2 Digital Inputs and Outputs: TXD (Input) and RXD (Output)
      3. 8.3.3 Protection Features
        1. 8.3.3.1 TXD Dominant Timeout (DTO)
        2. 8.3.3.2 Thermal Shutdown (TSD)
        3. 8.3.3.3 Undervoltage Lockout and Default State
        4. 8.3.3.4 Floating Pins
        5. 8.3.3.5 Unpowered Device
        6. 8.3.3.6 CAN Bus Short Circuit Current Limiting
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Bus Loading, Length and Number of Nodes
        2. 9.2.2.2 CAN Termination
      3. 9.2.3 Application Curve
    3. 9.3 DeviceNet Application
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
      1. 11.1.1 PCB Material
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 文档支持
      1. 12.1.1 相关文档
    2. 12.2 接收文档更新通知
    3. 12.3 社区资源
    4. 12.4 商标
    5. 12.5 静电放电警告
    6. 12.6 Glossary
  13. 13机械、封装和可订购信息

7.1 Test Circuits

ISO1042 dvr_v_tst_llsf09.gifFigure 15. Driver Voltage, Current and Test Definitions
ISO1042 bus_logic_lls983.gifFigure 16. Bus Logic State Voltage Definitions
ISO1042 sllsf09_dvr_tst_cir.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
Figure 17. Driver Test Circuit and Voltage Waveforms
ISO1042 rec_v_llsF09.gifFigure 18. Receiver Voltage and Current Definitions
ISO1042 sllsf09_rec_tst_cir.gif
A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle,
tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
Figure 19. Receiver Test Circuit and Voltage Waveforms

Table 1. Receiver Differential Input Voltage Threshold Test

INPUT OUTPUT
VCANH VCANL |VID| RXD
-29.5 V -30.5 V 1000 mV L VOL
30.5 V 29.5 V 1000 mV L
-19.55 V -20.45 V 900 mV L
20.45 V 19.55 V 900 mV L
-19.75 V -20.25 V 500 mV H VOH
20.25 V 19.75 V 500 mV H
-29.8 V -30.2 V 400 mV H
30.2 V 29.8 V 400 mV H
Open Open X H
ISO1042 sllsf09_tloop_tst_cir.gifFigure 20. tLOOP Test Circuit and Voltage Waveforms
ISO1042 sllsf09-fd-timing.gifFigure 21. CAN FD Timing Parameter Measurement
ISO1042 sllsf09_timeout_tst.gif
A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 6 ns, tf ≤ 6 ns, ZO = 50 Ω.
Figure 22. Dominant Time-out Test Circuit and Voltage Waveforms
ISO1042 sllsf09-dvr_short_cir_tst.gifFigure 23. Driver Short-Circuit Current Test Circuit and Waveforms
ISO1042 sllsf09_comm_mode.gifFigure 24. Common-Mode Transient Immunity Test Circuit
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