ZHCSIA2 May 2018 LMX2572LP
PRODUCTION DATA.
In a register write sequence, instead of sending 24 bits (one W/R bit, seven address bits, and 16 data bits) of payload for each register (with Block Programming), only the first register write requires the W/R bit and the address bits. The succeeding registers require sending only the 16-bit of data. However, the succeeding registers must be in descending order. For example, if the first register is R20, then all 24 bits of payload must be sent for R20. The next register must be R19, but only the 16-bit data is required. The programming sequence is as follows:
Since there is no CSB pulse between each register, the 16-bit of data field of each register can be sent immediately after the previous one.
Block Programming applies to both register write and read.