ZHCSIG6A July 2018 – October 2018 DS90UH940N-Q1
PRODUCTION DATA.
Table 11 lists the memory-mapped registers for the DS90UH940N-Q1 registers. All register offset addresses not listed in Table 11 should be considered as reserved locations and the register contents should not be modified.
In the register definitions under the TYPE heading, the following definitions apply:
Address | Acronym | Register Name | Section |
---|---|---|---|
0h | I2C_Device_ID | Go | |
1h | Reset | Go | |
2h | General_Configuration_0 | Go | |
3h | General_Configuration_1 | Go | |
4h | BCC_Watchdog_Control | Go | |
5h | I2C_Control_1 | Go | |
6h | I2C_Control_2 | Go | |
7h | REMOTE_ID | Go | |
8h | SlaveID_0 | Go | |
9h | SlaveID_1 | Go | |
Ah | SlaveID_2 | Go | |
Bh | SlaveID_3 | Go | |
Ch | SlaveID_4 | Go | |
Dh | SlaveID_5 | Go | |
Eh | SlaveID_6 | Go | |
Fh | SlaveID_7 | Go | |
10h | SlaveAlias_0 | Go | |
11h | SlaveAlias_1 | Go | |
12h | SlaveAlias_2 | Go | |
13h | SlaveAlias_3 | Go | |
14h | SlaveAlias_4 | Go | |
15h | SlaveAlias_5 | Go | |
16h | SlaveAlias_6 | Go | |
17h | SlaveAlias_7 | Go | |
18h | MAILBOX_18 | Go | |
19h | MAILBOX_19 | Go | |
1Ah | GPIO_9__Global_GPIO_Config | Go | |
1Bh | Frequency_Counter | Go | |
1Ch | General_Status | Go | |
1Dh | GPIO0_Config | Go | |
1Eh | GPIO1_2_Config | Go | |
1Fh | GPIO_3_Config | Go | |
20h | GPIO_5_6_Config | Go | |
21h | GPIO_7_8_Config | Go | |
22h | Datapath_Control | Go | |
23h | RX_Mode_Status | Go | |
24h | BIST_Control | Go | |
25h | BIST_ERROR_COUNT | Go | |
26h | SCL_High_Time | Go | |
27h | SCL_Low_Time | Go | |
28h | Datapath_Control_2 | Go | |
2Bh | I2S_Control | Go | |
2Eh | PCLK_Test_Mode | Go | |
34h | DUAL_RX_CTL | Go | |
35h | AEQ_CTL1 | Go | |
37h | MODE_SEL | Go | |
3Ah | I2S_DIVSEL | Go | |
3Bh | Adaptive_EQ_Status | Go | |
3Dh | General_Status | Go | |
41h | LINK_ERROR_COUNT | Go | |
43h | HSCC_CONTROL | Go | |
44h | ADAPTIVE_EQ_BYPASS | Go | |
45h | ADAPTIVE_EQ_MIN_MAX | Go | |
52h | CML_OUTPUT_CTL1 | Go | |
56h | CML_OUTPUT_ENABLE | Go | |
57h | CML_OUTPUT_CTL2 | Go | |
63h | CML_OUTPUT_CTL3 | Go | |
64h | PGCTL | Go | |
65h | PGCFG | Go | |
66h | PGIA | Go | |
67h | PGID | Go | |
68h | PGDBG | Go | |
69h | PGTSTDAT | Go | |
6Ah | CSICFG0 | Go | |
6Bh | CSICFG1 | Go | |
6Ch | CSIIA | Go | |
6Dh | CSIID | Go | |
6Eh | GPIO_Pin_Status_1 | Go | |
6Fh | GPIO_Pin_Status_2 | Go | |
80h | RX_BKSV0 | Go | |
81h | RX_BKSV1 | Go | |
82h | RX_BKSV2 | Go | |
83h | RX_BKSV3 | Go | |
84h | RX_BKSV4 | Go | |
90h | TX_KSV0 | Go | |
91h | TX_KSV1 | Go | |
92h | TX_KSV2 | Go | |
93h | TX_KSV3 | Go | |
94h | TX_KSV4 | Go | |
C0h | HDCP_DBG | Go | |
C1h | HDCP_DBG2 | Go | |
C4h | HDCP_STS | Go | |
C9h | KSV_FIFO_DATA | Go | |
CAh | KSV_FIFO_ADDR0 | Go | |
CBh | KSV_FIFO_ADDR1 | Go | |
E0h | RPTR_TX0 | Go | |
E1h | RPTR_TX1 | Go | |
E2h | RPTR_TX2 | Go | |
E3h | RPTR_TX3 | Go | |
F0h | HDCP_RX_ID0 | Go | |
F1h | HDCP_RX_ID1 | Go | |
F2h | HDCP_RX_ID2 | Go | |
F3h | HDCP_RX_ID3 | Go | |
F4h | HDCP_RX_ID4 | Go | |
F5h | HDCP_RX_ID5 | Go |