8.1 Overview

The ADS1219 is a small, low-power, 24-bit, ΔΣ ADC. In addition to the ΔΣ ADC core and single-cycle settling digital filter, the device offers a multiplexer (MUX), rail-to-rail input buffers, a programmable gain stage, an internal 2.048-V voltage reference, and a clock oscillator. All of these features are intended to reduce the required external circuitry in typical voltage, current, and temperature monitoring applications. The device is fully configured through a single register and controlled by six commands through an I²C-compatible interface. The Functional Block Diagram section shows the device functional block diagram.

The MUX selects the positive (AIN_P) and negative (AIN_N) signals that feed into the rail-to-rail input buffers. A gain stage with selectable gains of 1 and 4 follows the input buffers. The 24-bit ADC measures the differential signal provided after the gain stage. The converter core consists of a differential, switched-capacitor, ΔΣ modulator followed by a digital filter. The digital filter receives a high-speed bitstream from the modulator and outputs a code proportional to the input voltage. This architecture results in a very strong attenuation of any common-mode signal.

The device has two available conversion modes: single-shot conversion and continuous conversion mode. In single-shot conversion mode, the ADC performs one conversion of the input signal upon request and stores the value in an internal data buffer. The device then enters a low-power state to save power. Single-shot conversion mode is intended to provide significant power savings in systems that require only periodic conversions, or when there are long idle periods between conversions. In continuous conversion mode, the ADC automatically begins a conversion of the input signal as soon as the previous conversion is completed. New data are available at the programmed data rate. Data can be read at any time without concern of data corruption and always reflect the most recently completed conversion.