米6体育平台手机版

ZHCSII6C July 2018 – January 2023 OPA855

PRODUCTION DATA

7.5 Electrical Characteristics

at V_S+ = 5 V, V_S– = 0 V, G = 7 V/V, R_F = 453 Ω, input common-mode biased at midsupply, R_L = 200 Ω, output load is referenced to midsupply, and T_A = 25℃ (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
AC PERFORMANCE
SSBW	Small-signal bandwidth	V_OUT = 100 mV_PP		2.5		GHz
LSBW	Large-signal bandwidth	V_OUT = 2 V_PP		850		MHz
GBWP	Gain-bandwidth product			8		GHz
	Bandwdith for 0.1-dB flatness			200		MHz
SR	Slew rate (10%-90%)	V_OUT = 2-V step		2750		V/µs
t_r	Rise time	V_OUT = 100-mV step		0.17		ns
t_f	Fall time	V_OUT = 100-mV step		0.17		ns
	Settling time to 0.1%	V_OUT = 2-V step		2.3		ns
	Settling time to 0.001%	V_OUT = 2-V step		2600		ns
	Overshoot or undershoot	V_OUT = 2-V step		5%
	Overdrive recovery	2x output overdrive		3		ns
HD2	Second-order harmonic distortion	f = 10 MHz, V_OUT = 2 V_PP		90		dBc
HD2	Second-order harmonic distortion	f = 100 MHz, V_OUT = 2 V_PP		65		dBc
HD3	Third-order harmonic distortion	f = 10 MHz, V_OUT = 2 V_PP		86		dBc
HD3	Third-order harmonic distortion	f = 100 MHz, V_OUT = 2 V_PP		74		dBc
e_n	Input-referred voltage noise	f = 1 MHz		0.98		nV/√Hz
e_i	Input-referred current noise	f = 1 MHz		2.5		pA/√Hz
z_O	Closed-loop output impedance	f = 1 MHz		0.15		Ω
DC PERFORMANCE
A_OL	Open-loop voltage gain		70	76		dB
V_OS	Input offset voltage	T_A = 25°C	–1.5	±0.2	1.5	mV
ΔV_OS/ΔT	Input offset voltage drift	T_A= –40°C to 125°C		0.5		µV/°C
I_B	Input bias current ⁽¹⁾	T_A = 25°C	–18.5	–12	–5	µA
ΔI_B/ΔT	Input bias current drift	T_A= –40°C to +125°C		–0.08		µA/°C
I_BOS	Input offset current	T_A = 25°C	–1	±0.1	1	µA
ΔI_BOS/ΔT	Input offset current drift	T_A= –40°C to +125°C		1		nA/°C
CMRR	Common-mode rejection ratio	V_CM = ±0.5 V referred to midsupply	90	100		dB
INPUT
	Common-mode input resistance			2.3		MΩ
C_CM	Common-mode input capacitance			0.6		pF
	Differential input resistance			5		kΩ
C_DIFF	Differential input capacitance			0.2		pF
V_IH	Common-mode input range (high)	CMRR > 80 dB, V_S+ = 3.3 V	2.7	2.9		V
V_IL	Common-mode input range (low)	CMRR > 80 dB, V_S+ = 3.3 V		1.1	1.3	V
V_IH	Common-mode input range (high)	CMRR > 80 dB	4.4	4.6		V
V_IH	Common-mode input range (high)	T_A= –40°C to +125 °C, CMRR > 80 dB		4.3		V
V_IL	Common-mode input range (low)	CMRR > 80 dB		1.1	1.3	V
V_IL	Common-mode input range (low)	T_A= –40°C to +125°C, CMRR > 80 dB		1.3		V
OUTPUT
V_OH	Output voltage (high)⁽²⁾	T_A = 25°C, V_S+ = 3.3 V	2.35	2.4		V
V_OH	Output voltage (high)⁽²⁾	T_A = 25°C	3.95	4.1		V
V_OH	Output voltage (high)⁽²⁾	T_A = –40°C to +125°C		4		V
V_OL	Output voltage (low)⁽²⁾	T_A = 25°C, V_S+ = 3.3 V		1.05	1.15	V
V_OL	Output voltage (low)⁽²⁾	T_A = 25°C		1.05	1.15	V
V_OL	Output voltage (low)⁽²⁾	T_A = –40°C to +125°C		1.1		V
I_{O_LIN}	Linear output drive (sink and source)	R_L = 10 Ω, A_OL > 60 dB	65	80		mA
I_{O_LIN}	Linear output drive (sink and source)	T_A = –40°C to +125°C, R_L = 10 Ω, A_OL > 60 dB		70		mA
I_SC	Output short-circuit current		85	105		mA
POWER SUPPLY
I_Q	Quiescent current		16	17.8	19.5	mA
		T_A = –40°C		16.7
		T_A = 125°C		19.5
PSRR+	Positive power-supply rejection ratio		80	86		dB
PSRR–	Negative power-supply rejection ratio		70	80		dB
POWER DOWN
	Disable voltage threshold	Amplifier OFF below this voltage	0.65	1		V
	Enable voltage threshold	Amplifier ON below this voltage		1.5	1.8	V
	Power-down quiescent current			70	140	μA
	PD bias current			70	140	μA
	Turnon time delay	Time to V_OUT = 90% of final value		15		ns
	Turnoff time delay			120		ns

(1) Current flowing into the input pin is considered negative

(2) Amplifier output saturated