The TPS3430 uses an open-drain configuration for the WDO circuit, as shown in Figure 8-7. When the FET is off, the resistor pulls the drain of the transistor to VDD and when the FET is turned on, the FET attempts to pull the drain to ground, thus creating an effective resistor divider. The resistors in this divider must be chosen to ensure that V_OL is below its maximum value. To choose the proper pull-up resistor, there are three key specifications to keep in mind: the pull-up voltage (V_PU), the recommended maximum WDO pin current (I_WDO), and V_OL. The maximum V_OL is 0.4 V, meaning that the effective resistor divider created must be able to bring the voltage on the reset pin below 0.4 V with I_WDO kept below 10 mA. For this example, with a V_PU of 1.8 V, a resistor must be chosen to keep I_WDO below 200 μA because this value is the maximum consumption current allowed. To ensure this specification is met, a pull-up resistor value of 10 kΩ was selected, which sinks a maximum of 180 μA when WDO is asserted.