ZHCSIP8B August   2018  – April 2020 AMC1035

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      应用示例
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Reference Output
      4. 7.3.4 Clock Input
      5. 7.3.5 Digital Output
      6. 7.3.6 Manchester Coding Feature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Behavior in Case of a Full-Scale Input
      2. 7.4.2 Fail-Safe Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Digital Filter Usage
    2. 8.2 Typical Applications
      1. 8.2.1 Voltage Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 IGBT Temperature Sensing
      3. 8.2.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

8.2.1.2 Detailed Design Procedure

Use Ohm's Law to calculate the minimum total resistance of the resistive dividers to limit the cross current to the desired values:

  • For the voltage sensing on the DC bus: RDC1 + RDC2 + RDC3 = VBUS / IDC
  • For the voltage sensing on the output phases U, V, and W: RAC1 + RAC2 + RAC3 = VPHASE (max) / IAC

Consider the following two restrictions to choose the proper value of the resistors RDC3 and RAC3:

  • The voltage drop caused by the nominal voltage range of the system must not exceed the recommended input voltage range of the AMC1035: VxC3 ≤ VFSR
  • The voltage drop caused by the maximum allowed system overvoltage must not exceed the input voltage that causes a clipping output: VxC3 ≤ VClipping

Use similar approach for calculation of the shunt resistor values RSHUNT and see the AMC1306M25 data sheet for further details.

Table 3 lists examples of nominal E96-series (1% accuracy) resistor values for systems using 600 V and 800 V on the DC bus.

Table 3. Resistor Value Examples for DC Bus Sensing

PARAMETER 600-V DC BUS 800-V DC Bus
Resistive divider resistor RDC1 3.01 MΩ 4.22 MΩ
Resistive divider resistor RDC2 3.01 MΩ 4.22 MΩ
Sense resistor RDC3 10 kΩ 10.5 kΩ
Resulting current through resistive divider IDC 99.5 µA 94.7 µA
Resulting voltage drop on sense resistor VRDC3 0.995 V 0.994 V

Table 4 lists examples of nominal E96-series (1% accuracy) resistor values for systems using 230 V and 690 V on the output phases.

Table 4. Resistor Value Examples for Output Phase Voltage Sensing

PARAMETER ±400-VAC PHASE ±690-VAC PHASE
Resistive divider resistor RAC1 2.0 MΩ 3.48 MΩ
Resistive divider resistor RAC2 2.0 MΩ 3.48 MΩ
Sense resistor RAC3 10.0 kΩ 10.0 kΩ
Resulting current through resistive divider IAC 99.8 µA 99.0 µA
Resulting voltage drop on sense resistor VRAC3 ±0.998 V ±0.990 V

Use a power supply with a nominal voltage of 3.3 V to directly connect all modulators to the microcontroller.

For modulator output bitstream filtering, a device from TI's TMS320F2807x family of low-cost microcontrollers (MCUs) or TMS320F2837x family of dual-core MCUs is recommended. These MCU families support up to eight channels of dedicated hardwired filter structures called sigma-delta filter modules (SDFMs) that significantly simplify system level design by offering two filtering paths per channel: one providing high accuracy results for the control loop and one that offers a fast response path for overcurrent detection. Use one of the pulse-width modulation (PWM) sources inside the MCU to generate the clock for the modulators and for easy synchronization of all feedback signals and the switching control of the gate drivers.

Figure 45 uses a clock buffer to distribute the clock reference signal generated on one of the PWM outputs of the MCU (called PWMx in Figure 45) to all modulators used in the circuit and as a reference for the digital filters in the MCU. In this example, TI's CDCLVC1106 is used for this purpose. Each CDCLVC1106 output can drive a load of 8 pF that is sufficient to drive up to two modulator and up to four SDFM clock inputs.
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