ZHCSIP8B August   2018  – April 2020 AMC1035

PRODUCTION DATA.  

  1. 1 特性
  2. 2 应用
  3. 3 说明
    1.     Device Images
      1.      应用示例
  4. 4 修订历史记录
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Analog Input
      2. 7.3.2 Modulator
      3. 7.3.3 Reference Output
      4. 7.3.4 Clock Input
      5. 7.3.5 Digital Output
      6. 7.3.6 Manchester Coding Feature
    4. 7.4 Device Functional Modes
      1. 7.4.1 Output Behavior in Case of a Full-Scale Input
      2. 7.4.2 Fail-Safe Output
  8. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Digital Filter Usage
    2. 8.2 Typical Applications
      1. 8.2.1 Voltage Sensing
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
        3. 8.2.1.3 Application Curve
      2. 8.2.2 IGBT Temperature Sensing
      3. 8.2.3 What to Do and What Not to Do
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11器件和文档支持
    1. 11.1 文档支持
      1. 11.1.1 相关文档
    2. 11.2 接收文档更新通知
    3. 11.3 社区资源
    4. 11.4 商标
    5. 11.5 静电放电警告
    6. 11.6 Glossary
  12. 12机械、封装和可订购信息

5 Pin Configuration and Functions

D Package
8-Pin SOIC
Top View

Pin Functions

PIN I/O DESCRIPTION
NO. NAME
1 MCE I Manchester coding enabled, active high, with internal pulldown resistor (typical value: 200 kΩ).
The polarity of this signal must not be changed when the clock signal is applied.
2 AINP I Noninverting analog input.
3 AINN I Inverting analog input.
4 REFOUT O Reference output: 2.5 V nominal, maximum ±5-mA sink and source capability.
5 GND — Ground reference.
6 DOUT O Modulator bitstream data output, updated with the rising edge of the clock signal present on CLKIN.
This pin is a Manchester coded output if MCE is pulled high. Use the rising edge of the clock to latch the modulator bitstream at the input of the digital filter device.
7 CLKIN I Modulator clock input: 9 MHz to 21 MHz with an internal pulldown resistor (typical value: 200 kΩ).
The clock signal must be applied continuously for proper device operation; see the Clock Input section for additional details.
8 VDD — Power supply, 3.0 V to 5.5 V.
See the Power Supply Recommendations section for decoupling recommendations.
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