9.2.3.2 Detailed Design Procedure

The primary constraint for this application is monitoring a 12-V rail while preventing the VDD pin on TPS3840 from exceeding the recommended maximum of 10 V. This is accomplished by sizing the resistor divider so that when the 12-V rail drops to 10 V, the VDD pin for TPS3840 will be at 4.9 V which is the V_IT- threshold for triggering a undervoltage condition for TPS3840DL49 as shown in Equation 7.

where V_{rail_trigger} is the trigger voltage of the rail being monitored, V_IT- is the falling threshold on the VDD pin of TPS3840, and R_top and R_bottom are the top and bottom resistors of the external resistor divider. V_IT- is fixed per device variant and is 4.9 V for TPS3840DL49. Substituting in the values from Figure 51, the undervoltage trigger threshold for the rail is set to 10.045 V.

Since the undervoltage trigger of 10 V on the rail corresponds to 4.9 V undervoltage threshold trigger of the TPS3840 device, there is plenty of room for the rail to rise up while maintaining less than 10 V on the VDD pin of the TPS3840. Equation 8 shows the maximum rail voltage that still meets the 10 V maximum at the VDD pin for TPS3840.

This means the monitored voltage rail can go as high as 20.5 V and still not violate the recommended maximum for the VDD pin on TPS3840. This is useful when monitoring a voltage rail that has a wide range that may go much higher than the nominal rail voltage such as in this case with the specification that the 12-V rail can go as high as 18 V. Notice that the resistor values chosen are less than 100kΩ to preserve the accuracy set by the internal resistor divider. Good design practice recommends using a 0.1-µF capacitor on the VDD pin and this capacitance may need to increase when using an external resistor divider.